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| author | Peter Maydell | 2014-01-31 15:47:36 +0100 |
|---|---|---|
| committer | Peter Maydell | 2014-01-31 15:47:36 +0100 |
| commit | a08582f41e94b5a7ee3e53ad1e719d24431aa675 (patch) | |
| tree | c60c983a73a7180203bb78123183d7bd08ba7069 /include/exec | |
| parent | target-arm: Add AArch32 SIMD VCVTA, VCVTN, VCVTP and VCVTM (diff) | |
| download | qemu-a08582f41e94b5a7ee3e53ad1e719d24431aa675.tar.gz qemu-a08582f41e94b5a7ee3e53ad1e719d24431aa675.tar.xz qemu-a08582f41e94b5a7ee3e53ad1e719d24431aa675.zip | |
target-arm: A64: Add SIMD three-different multiply accumulate insns
Add support for the multiply-accumulate instructions from the
SIMD three-different instructions group (C3.6.15):
* skeleton decode of unallocated encodings and split of
the group into its three sub-parts
* framework for handling the 64x64->128 widening subpart
* implementation of the multiply-accumulate instructions
SMLAL, SMLAL2, UMLAL, UMLAL2, SMLSL, SMLSL2, UMLSL, UMLSL2,
UMULL, UMULL2, SMULL, SMULL2
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'include/exec')
0 files changed, 0 insertions, 0 deletions