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| author | Peter Maydell | 2016-06-17 16:23:47 +0200 |
|---|---|---|
| committer | Peter Maydell | 2016-06-17 16:23:51 +0200 |
| commit | b1a0eb777d9304ad69c577d5fdd8e20e4bf5644f (patch) | |
| tree | 9d0ca8f7f1fa404bb28f0849d8ef1b2a5bbb9091 /include/exec | |
| parent | hw/intc/arm_gicv3: Implement gicv3_cpuif_update() (diff) | |
| download | qemu-b1a0eb777d9304ad69c577d5fdd8e20e4bf5644f.tar.gz qemu-b1a0eb777d9304ad69c577d5fdd8e20e4bf5644f.tar.xz qemu-b1a0eb777d9304ad69c577d5fdd8e20e4bf5644f.zip | |
hw/intc/arm_gicv3: Implement CPU i/f SGI generation registers
Implement the registers in the GICv3 CPU interface which generate
new SGI interrupts.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org>
Tested-by: Shannon Zhao <shannon.zhao@linaro.org>
Message-id: 1465915112-29272-18-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'include/exec')
0 files changed, 0 insertions, 0 deletions