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| author | Richard Henderson | 2018-05-23 04:51:00 +0200 |
|---|---|---|
| committer | Stafford Horne | 2018-07-02 17:05:28 +0200 |
| commit | b9bed1b9ab37a6ae62e88a52cbcbd2ad81aa1056 (patch) | |
| tree | 15dba503a0704eca2b64bf8b77e7621bcd3208b5 /include/exec | |
| parent | target/openrisc: Fix tlb flushing in mtspr (diff) | |
| download | qemu-b9bed1b9ab37a6ae62e88a52cbcbd2ad81aa1056.tar.gz qemu-b9bed1b9ab37a6ae62e88a52cbcbd2ad81aa1056.tar.xz qemu-b9bed1b9ab37a6ae62e88a52cbcbd2ad81aa1056.zip | |
target/openrisc: Fix cpu_mmu_index
The code in cpu_mmu_index does not properly honor SR_DME.
This bug has workarounds elsewhere in that we flush the
tlb more often than necessary, on the state changes that
should be reflected in a change of mmu_index.
Fixing this means that we can respect the mmu_index that
is given to tlb_flush.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Stafford Horne <shorne@gmail.com>
Diffstat (limited to 'include/exec')
0 files changed, 0 insertions, 0 deletions