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| author | Nathaniel Graff | 2018-07-24 18:52:46 +0200 |
|---|---|---|
| committer | Palmer Dabbelt | 2019-06-24 08:44:41 +0200 |
| commit | b9d1848ebe8f083482307be725cca7883fca7566 (patch) | |
| tree | ec3ac603c0e2dbd7445d1ce1fd2a7d095d12f9f5 /include/exec | |
| parent | target/riscv: Allow setting ISA extensions via CPU props (diff) | |
| download | qemu-b9d1848ebe8f083482307be725cca7883fca7566.tar.gz qemu-b9d1848ebe8f083482307be725cca7883fca7566.tar.xz qemu-b9d1848ebe8f083482307be725cca7883fca7566.zip | |
sifive_prci: Read and write PRCI registers
Writes to the SiFive PRCI registers are preserved while leaving the
ready bits set for the HFX/HFR oscillators and the lock bit set for the
PLL.
Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
Reviewed-by: Michael Clark <mjc@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'include/exec')
0 files changed, 0 insertions, 0 deletions