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| author | Peter Maydell | 2017-09-14 19:43:17 +0200 |
|---|---|---|
| committer | Peter Maydell | 2017-09-14 19:43:17 +0200 |
| commit | c6158878650c01b2c753b2ea7d0967c8fe5ca59e (patch) | |
| tree | 075aa99de925b3bb67b79eb33f5bcc0af368e324 /include/exec | |
| parent | target/arm: Clear exclusive monitor on v7M reset, exception entry/exit (diff) | |
| download | qemu-c6158878650c01b2c753b2ea7d0967c8fe5ca59e.tar.gz qemu-c6158878650c01b2c753b2ea7d0967c8fe5ca59e.tar.xz qemu-c6158878650c01b2c753b2ea7d0967c8fe5ca59e.zip | |
target/arm: Get PRECISERR and IBUSERR the right way round
For a bus fault, the M profile BFSR bit PRECISERR means a bus
fault on a data access, and IBUSERR means a bus fault on an
instruction access. We had these the wrong way around; fix this.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 1505137930-13255-4-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'include/exec')
0 files changed, 0 insertions, 0 deletions