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authorAlistair Francis2016-01-12 23:39:18 +0100
committerPeter Maydell2016-01-15 15:34:54 +0100
commitdc3b89ef87dc0ecd5ba435c155ad8511b848d909 (patch)
tree67515fee1d0385193c4ea4c42fa485b2746b9582 /include/exec
parenttarget-arm: Use the right MMU index in arm_regime_using_lpae_format (diff)
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xlnx-zynqmp: Add support for high DDR memory regions
The Xilinx ZynqMP SoC and EP108 board supports three memory regions: - A 2GB region starting at 0 - A 32GB region starting at 32GB - A 256GB region starting at 768GB This patch adds support for the first two memory regions, which is automatically created based on the size specified by the QEMU memory command line argument. On hardware the physical memory region is one continuous region, it is then mapped into the three different regions by the DDRC. As we don't model the DDRC this is done at startup by QEMU. The board creates the memory region and then passes that memory region to the SoC. The SoC then maps the memory regions. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: a1e47db941d65733724a300fcd98b74fbeeaaf22.1452637205.git.alistair.francis@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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