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| author | Bin Meng | 2020-06-16 02:50:37 +0200 |
|---|---|---|
| committer | Alistair Francis | 2020-06-19 17:25:27 +0200 |
| commit | e8905c6ce86f5023f6814abd7c72a809e5d018ec (patch) | |
| tree | 9aa2ac588d640b5c41867877563c15c6e9ea25f7 /include/exec | |
| parent | hw/riscv: sifive_u: Add a new property msel for MSEL pin state (diff) | |
| download | qemu-e8905c6ce86f5023f6814abd7c72a809e5d018ec.tar.gz qemu-e8905c6ce86f5023f6814abd7c72a809e5d018ec.tar.xz qemu-e8905c6ce86f5023f6814abd7c72a809e5d018ec.zip | |
target/riscv: Rename IBEX CPU init routine
Current IBEX CPU init routine name seems to be too generic.
Since it uses a different reset vector from the generic one,
it merits a dedicated name.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 1592268641-7478-2-git-send-email-bmeng.cn@gmail.com
Message-Id: <1592268641-7478-2-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'include/exec')
0 files changed, 0 insertions, 0 deletions