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| author | Sai Pavan Boddu | 2020-05-12 16:54:53 +0200 |
|---|---|---|
| committer | Jason Wang | 2020-06-18 15:05:51 +0200 |
| commit | fdd35195c5ed57162b080a20df588773768b589c (patch) | |
| tree | edd10571aa4481ff79a77f825221f1c1ef087b7a /include/exec | |
| parent | net: cadence_gem: Update the reset value for interrupt mask register (diff) | |
| download | qemu-fdd35195c5ed57162b080a20df588773768b589c.tar.gz qemu-fdd35195c5ed57162b080a20df588773768b589c.tar.xz qemu-fdd35195c5ed57162b080a20df588773768b589c.zip | |
net: cadence_gem: TX_LAST bit should be set by guest
TX_LAST bit should not be set by hardware, its set by guest to inform
the last bd of the frame.
Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Diffstat (limited to 'include/exec')
0 files changed, 0 insertions, 0 deletions