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| author | Vincent Fazio | 2020-03-19 14:32:44 +0100 |
|---|---|---|
| committer | David Gibson | 2020-03-24 01:56:37 +0100 |
| commit | feb39b62288cb780561ca83b84ca82dceb3cedb9 (patch) | |
| tree | c29b52a9a49c44dfa7a8e346ab194bc540f17494 /include/exec | |
| parent | target/ppc: Fix ISA v3.0 (POWER9) slbia implementation (diff) | |
| download | qemu-feb39b62288cb780561ca83b84ca82dceb3cedb9.tar.gz qemu-feb39b62288cb780561ca83b84ca82dceb3cedb9.tar.xz qemu-feb39b62288cb780561ca83b84ca82dceb3cedb9.zip | |
target/ppc: don't byte swap ELFv2 signal handler
Previously, the signal handler would be byte swapped if the target and
host CPU used different endianness. This would cause a SIGSEGV when
attempting to translate the opcode pointed to by the swapped address.
Thread 1 "qemu-ppc64" received signal SIGSEGV, Segmentation fault.
0x00000000600a9257 in ldl_he_p (ptr=0x4c2c061000000000) at qemu/include/qemu/bswap.h:351
351 __builtin_memcpy(&r, ptr, sizeof(r));
#0 0x00000000600a9257 in ldl_he_p (ptr=0x4c2c061000000000) at qemu/include/qemu/bswap.h:351
#1 0x00000000600a92fe in ldl_be_p (ptr=0x4c2c061000000000) at qemu/include/qemu/bswap.h:449
#2 0x00000000600c0790 in translator_ldl_swap at qemu/include/exec/translator.h:201
#3 0x000000006011c1ab in ppc_tr_translate_insn at qemu/target/ppc/translate.c:7856
#4 0x000000006005ae70 in translator_loop at qemu/accel/tcg/translator.c:102
The signal handler will be byte swapped as a result of the __get_user()
call in sigaction() if it is necessary, no additional swap is required.
Signed-off-by: Vincent Fazio <vfazio@gmail.com>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20200319133244.8818-1-vfazio@xes-inc.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'include/exec')
0 files changed, 0 insertions, 0 deletions