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author | Richard Henderson | 2021-05-26 00:58:10 +0200 |
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committer | Peter Maydell | 2021-06-03 17:43:26 +0200 |
commit | 60c8f7265d7eb51dfb38ea6701d10cbe2d7c7a64 (patch) | |
tree | 643b8806c9ba6e8d716708c8f7011d9904dbb46d /include/fpu/softfloat-types.h | |
parent | target/arm: Implement vector float32 to bfloat16 conversion (diff) | |
download | qemu-60c8f7265d7eb51dfb38ea6701d10cbe2d7c7a64.tar.gz qemu-60c8f7265d7eb51dfb38ea6701d10cbe2d7c7a64.tar.xz qemu-60c8f7265d7eb51dfb38ea6701d10cbe2d7c7a64.zip |
softfpu: Add float_round_to_odd_inf
For Arm BFDOT and BFMMLA, we need a version of round-to-odd
that overflows to infinity, instead of the max normal number.
Cc: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210525225817.400336-6-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/fpu/softfloat-types.h')
-rw-r--r-- | include/fpu/softfloat-types.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/include/fpu/softfloat-types.h b/include/fpu/softfloat-types.h index 8a3f20fae9..3b757c3d6a 100644 --- a/include/fpu/softfloat-types.h +++ b/include/fpu/softfloat-types.h @@ -134,8 +134,10 @@ typedef enum __attribute__((__packed__)) { float_round_up = 2, float_round_to_zero = 3, float_round_ties_away = 4, - /* Not an IEEE rounding mode: round to the closest odd mantissa value */ + /* Not an IEEE rounding mode: round to closest odd, overflow to max */ float_round_to_odd = 5, + /* Not an IEEE rounding mode: round to closest odd, overflow to inf */ + float_round_to_odd_inf = 6, } FloatRoundMode; /* |