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author | Richard Henderson | 2021-10-12 13:41:59 +0200 |
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committer | Richard Henderson | 2021-10-12 13:41:59 +0200 |
commit | 81d8537cb297d57b0897797f1329e4d755a0eaf4 (patch) | |
tree | 360aa93c0291dc6557a7dbe6a45de2779e584ddd /include/hw/arm/aspeed_soc.h | |
parent | Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into ... (diff) | |
parent | aspeed/smc: Dump address offset in trace events (diff) | |
download | qemu-81d8537cb297d57b0897797f1329e4d755a0eaf4.tar.gz qemu-81d8537cb297d57b0897797f1329e4d755a0eaf4.tar.xz qemu-81d8537cb297d57b0897797f1329e4d755a0eaf4.zip |
Merge remote-tracking branch 'remotes/clg/tags/pull-aspeed-20211012' into staging
Aspeed patches :
* I2C QOMify (Cedric)
* SMC model cleanup and QOMify (Cedric)
* ADC model (Peter and Andrew)
* GPIO fixes (Peter)
# gpg: Signature made Tue 12 Oct 2021 12:36:22 AM PDT
# gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [marginal]
# gpg: WARNING: This key is not certified with sufficiently trusted signatures!
# gpg: It is not certain that the signature belongs to the owner.
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1
* remotes/clg/tags/pull-aspeed-20211012:
aspeed/smc: Dump address offset in trace events
aspeed/wdt: Add trace events
hw/arm: Integrate ADC model into Aspeed SoC
hw/adc: Add basic Aspeed ADC model
hw: aspeed_gpio: Fix GPIO array indexing
hw: aspeed_gpio: Fix pin I/O type declarations
aspeed/i2c: QOMify AspeedI2CBus
aspeed/smc: Remove unused attribute 'irqline'
aspeed/smc: Introduce a new addr_width() class handler
aspeed/smc: Add default reset values
aspeed/smc: QOMify AspeedSMCFlash
aspeed/smc: Rename AspeedSMCFlash 'id' to 'cs'
aspeed/smc: Remove the 'size' attribute from AspeedSMCFlash
aspeed/smc: Remove the 'flash' attribute from AspeedSMCFlash
aspeed/smc: Drop AspeedSMCController structure
aspeed/smc: Stop using the model name for the memory regions
aspeed/smc: Introduce aspeed_smc_error() helper
aspeed/smc: Add watchdog Control/Status Registers
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'include/hw/arm/aspeed_soc.h')
-rw-r--r-- | include/hw/arm/aspeed_soc.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index 87d76c9259..8139358549 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -15,6 +15,7 @@ #include "hw/cpu/a15mpcore.h" #include "hw/intc/aspeed_vic.h" #include "hw/misc/aspeed_scu.h" +#include "hw/adc/aspeed_adc.h" #include "hw/misc/aspeed_sdmc.h" #include "hw/misc/aspeed_xdma.h" #include "hw/timer/aspeed_timer.h" @@ -53,6 +54,7 @@ struct AspeedSoCState { AspeedSCUState scu; AspeedHACEState hace; AspeedXDMAState xdma; + AspeedADCState adc; AspeedSMCState fmc; AspeedSMCState spi[ASPEED_SPIS_NUM]; EHCISysBusState ehci[ASPEED_EHCIS_NUM]; |