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authorPeter Maydell2021-02-19 15:46:02 +0100
committerPeter Maydell2021-03-08 18:20:02 +0100
commita459e849aa2b683fac20fc72db9b4b1d90a4b4b9 (patch)
tree905480ccc8379e9c477c960059b77e64229113c7 /include/hw/arm
parenthw/arm/armsse: Move sysctl register block into data-driven framework (diff)
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hw/arm/armsse: Move PPUs into data-driven framework
Move the PPUs into the data-driven device placement framework. We don't implement them, so they are just TYPE_UNIMPLEMENTED stubs. Because the SSE-200 and the IotKit diverge here (the IoTKit does not have the PPUs) we need to separate out the ARMSSEDeviceInfo for the two variants, and only add the PPUs to the SSE-200. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210219144617.4782-30-peter.maydell@linaro.org
Diffstat (limited to 'include/hw/arm')
-rw-r--r--include/hw/arm/armsse.h10
1 files changed, 1 insertions, 9 deletions
diff --git a/include/hw/arm/armsse.h b/include/hw/arm/armsse.h
index 7416c08a80..eb4e937173 100644
--- a/include/hw/arm/armsse.h
+++ b/include/hw/arm/armsse.h
@@ -135,14 +135,6 @@ OBJECT_DECLARE_TYPE(ARMSSE, ARMSSEClass,
#define SSE_MAX_CPUS 2
-/* These define what each PPU in the ppu[] index is for */
-#define CPU0CORE_PPU 0
-#define CPU1CORE_PPU 1
-#define DBG_PPU 2
-#define RAM0_PPU 3
-#define RAM1_PPU 4
-#define RAM2_PPU 5
-#define RAM3_PPU 6
#define NUM_PPUS 7
/* Number of CPU IRQs used by the SSE itself */
@@ -176,7 +168,7 @@ struct ARMSSE {
IoTKitSysCtl sysinfo;
ARMSSEMHU mhu[2];
- UnimplementedDeviceState ppu[NUM_PPUS];
+ UnimplementedDeviceState unimp[NUM_PPUS];
UnimplementedDeviceState cachectrl[SSE_MAX_CPUS];
UnimplementedDeviceState cpusecctrl[SSE_MAX_CPUS];