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authorPeter Maydell2018-03-02 15:37:10 +0100
committerPeter Maydell2018-03-02 15:37:10 +0100
commit86f4c7e05b1c44dbe1b329a51f311f10aef6ff34 (patch)
tree6073147f05719812e5ecb14ffd6994a66fed9a7f /include/hw/core/split-irq.h
parentMerge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2018-03-01' into st... (diff)
parenttarget/arm: Enable ARM_FEATURE_V8_FCMA (diff)
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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20180302' into staging
target-arm queue: * implement FCMA and RDM v8.1 and v8.3 instructions * enable Cortex-M33 v8M core, and provide new mps2-an505 board model that uses it * decodetree: Propagate return value from translate subroutines * xlnx-zynqmp: Implement the RTC device # gpg: Signature made Fri 02 Mar 2018 11:05:40 GMT # gpg: using RSA key 3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20180302: (39 commits) target/arm: Enable ARM_FEATURE_V8_FCMA target/arm: Decode t32 simd 3reg and 2reg_scalar extension target/arm: Decode aa32 armv8.3 2-reg-index target/arm: Decode aa32 armv8.3 3-same target/arm: Decode aa64 armv8.3 fcmla target/arm: Decode aa64 armv8.3 fcadd target/arm: Add ARM_FEATURE_V8_FCMA target/arm: Enable ARM_FEATURE_V8_RDM target/arm: Decode aa32 armv8.1 two reg and a scalar target/arm: Decode aa32 armv8.1 three same target/arm: Decode aa64 armv8.1 scalar/vector x indexed element target/arm: Decode aa64 armv8.1 three same extra target/arm: Decode aa64 armv8.1 scalar three same extra target/arm: Refactor disas_simd_indexed size checks target/arm: Refactor disas_simd_indexed decode target/arm: Add ARM_FEATURE_V8_RDM mps2-an505: New board model: MPS2 with AN505 Cortex-M33 FPGA image hw/arm/iotkit: Model Arm IOT Kit hw/misc/iotkit-secctl: Add remaining simple registers hw/misc/iotkit-secctl: Add handling for PPCs ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/core/split-irq.h')
-rw-r--r--include/hw/core/split-irq.h57
1 files changed, 57 insertions, 0 deletions
diff --git a/include/hw/core/split-irq.h b/include/hw/core/split-irq.h
new file mode 100644
index 0000000000..bb87157c5a
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+++ b/include/hw/core/split-irq.h
@@ -0,0 +1,57 @@
+/*
+ * IRQ splitter device.
+ *
+ * Copyright (c) 2018 Linaro Limited.
+ * Written by Peter Maydell
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+/* This is a simple device which has one GPIO input line and multiple
+ * GPIO output lines. Any change on the input line is forwarded to all
+ * of the outputs.
+ *
+ * QEMU interface:
+ * + one unnamed GPIO input: the input line
+ * + N unnamed GPIO outputs: the output lines
+ * + QOM property "num-lines": sets the number of output lines
+ */
+#ifndef HW_SPLIT_IRQ_H
+#define HW_SPLIT_IRQ_H
+
+#include "hw/irq.h"
+#include "hw/sysbus.h"
+#include "qom/object.h"
+
+#define TYPE_SPLIT_IRQ "split-irq"
+
+#define MAX_SPLIT_LINES 16
+
+typedef struct SplitIRQ SplitIRQ;
+
+#define SPLIT_IRQ(obj) OBJECT_CHECK(SplitIRQ, (obj), TYPE_SPLIT_IRQ)
+
+struct SplitIRQ {
+ DeviceState parent_obj;
+
+ qemu_irq out_irq[MAX_SPLIT_LINES];
+ uint16_t num_lines;
+};
+
+#endif