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| author | Cédric Le Goater | 2019-01-29 12:46:05 +0100 |
|---|---|---|
| committer | Peter Maydell | 2019-01-29 12:46:05 +0100 |
| commit | 597d6bb3e8a93c4c0670df93f07c321ae84d2930 (patch) | |
| tree | 9805fce96bf95bc0eab98c975b2a18f939890152 /include/hw/cpu | |
| parent | aspeed/smc: fix default read value (diff) | |
| download | qemu-597d6bb3e8a93c4c0670df93f07c321ae84d2930.tar.gz qemu-597d6bb3e8a93c4c0670df93f07c321ae84d2930.tar.xz qemu-597d6bb3e8a93c4c0670df93f07c321ae84d2930.zip | |
aspeed/smc: define registers for all possible CS
The model should expose one control register per possible CS. When
testing the validity of the register number in the read operation,
replace 's->num_cs' by 'ctrl->max_slaves' which represents the maximum
number of flash devices a controller can handle.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-id: 20190124140519.13838-3-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/cpu')
0 files changed, 0 insertions, 0 deletions