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author | Ben Widawsky | 2022-04-29 16:40:29 +0200 |
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committer | Michael S. Tsirkin | 2022-05-13 12:13:36 +0200 |
commit | cd90126b4ced427697d79eb5002544a7621ec647 (patch) | |
tree | c8593a6833d64b16bacd1bb206017f578f4ca3af /include/hw/cxl/cxl.h | |
parent | MAINTAINERS: Add entry for Compute Express Link Emulation (diff) | |
download | qemu-cd90126b4ced427697d79eb5002544a7621ec647.tar.gz qemu-cd90126b4ced427697d79eb5002544a7621ec647.tar.xz qemu-cd90126b4ced427697d79eb5002544a7621ec647.zip |
hw/cxl/device: Introduce a CXL device (8.2.8)
A CXL device is a type of CXL component. Conceptually, a CXL device
would be a leaf node in a CXL topology. From an emulation perspective,
CXL devices are the most complex and so the actual implementation is
reserved for discrete commits.
This new device type is specifically catered towards the eventual
implementation of a Type3 CXL.mem device, 8.2.8.5 in the CXL 2.0
specification.
Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Adam Manzanares <a.manzanares@samsung.com>
Message-Id: <20220429144110.25167-5-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'include/hw/cxl/cxl.h')
-rw-r--r-- | include/hw/cxl/cxl.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/cxl/cxl.h b/include/hw/cxl/cxl.h index 8c738c7a2b..b9d1ac3fad 100644 --- a/include/hw/cxl/cxl.h +++ b/include/hw/cxl/cxl.h @@ -12,5 +12,6 @@ #include "cxl_pci.h" #include "cxl_component.h" +#include "cxl_device.h" #endif |