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author | Jamin Lin | 2022-05-25 10:31:33 +0200 |
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committer | Cédric Le Goater | 2022-05-25 10:31:33 +0200 |
commit | 247c00294a4b3cc694f24811eef07e57eb67aa82 (patch) | |
tree | 5a02d372efdf5a2712f23fe485945a4d37e66a09 /include/hw/gpio | |
parent | hw/gpio: Add ASPEED GPIO model for AST1030 (diff) | |
download | qemu-247c00294a4b3cc694f24811eef07e57eb67aa82.tar.gz qemu-247c00294a4b3cc694f24811eef07e57eb67aa82.tar.xz qemu-247c00294a4b3cc694f24811eef07e57eb67aa82.zip |
hw/gpio support GPIO index mode for write operation.
It did not support GPIO index mode for read operation.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20220525053444.27228-4-jamin_lin@aspeedtech.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'include/hw/gpio')
-rw-r--r-- | include/hw/gpio/aspeed_gpio.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/include/hw/gpio/aspeed_gpio.h b/include/hw/gpio/aspeed_gpio.h index 6dee3cd438..41b36524d0 100644 --- a/include/hw/gpio/aspeed_gpio.h +++ b/include/hw/gpio/aspeed_gpio.h @@ -50,6 +50,20 @@ enum GPIORegType { gpio_reg_input_mask, }; +/* GPIO index mode */ +enum GPIORegIndexType { + gpio_reg_idx_data = 0, + gpio_reg_idx_direction, + gpio_reg_idx_interrupt, + gpio_reg_idx_debounce, + gpio_reg_idx_tolerance, + gpio_reg_idx_cmd_src, + gpio_reg_idx_input_mask, + gpio_reg_idx_reserved, + gpio_reg_idx_new_w_cmd_src, + gpio_reg_idx_new_r_cmd_src, +}; + typedef struct AspeedGPIOReg { uint16_t set_idx; enum GPIORegType type; |