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| author | Cédric Le Goater | 2019-11-19 15:11:57 +0100 |
|---|---|---|
| committer | Peter Maydell | 2019-12-16 11:46:34 +0100 |
| commit | 95b56e173e20267778965a2bfd1afd517f7342c4 (patch) | |
| tree | cea88eb3f1defdab586cdae5d3eb8c24cbf5e365 /include/hw/i2c | |
| parent | aspeed/i2c: Check SRAM enablement on AST2500 (diff) | |
| download | qemu-95b56e173e20267778965a2bfd1afd517f7342c4.tar.gz qemu-95b56e173e20267778965a2bfd1afd517f7342c4.tar.xz qemu-95b56e173e20267778965a2bfd1afd517f7342c4.zip | |
aspeed: Add a DRAM memory region at the SoC level
Currently, we link the DRAM memory region to the FMC model (for DMAs)
through a property alias at the SoC level. The I2C model will need a
similar region for DMA support, add a DRAM region property at the SoC
level for both model to use.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Tested-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-id: 20191119141211.25716-4-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/i2c')
0 files changed, 0 insertions, 0 deletions