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| author | Klaus Jensen | 2022-06-13 14:05:48 +0200 |
|---|---|---|
| committer | Cédric Le Goater | 2022-06-22 09:49:34 +0200 |
| commit | d72a712ce038df621c227c0843354c553fe91b8a (patch) | |
| tree | e0c2237d5c852114ad81705818639cc3ff2df2f7 /include/hw/i2c | |
| parent | hw/i2c/aspeed: rework raise interrupt trace event (diff) | |
| download | qemu-d72a712ce038df621c227c0843354c553fe91b8a.tar.gz qemu-d72a712ce038df621c227c0843354c553fe91b8a.tar.xz qemu-d72a712ce038df621c227c0843354c553fe91b8a.zip | |
hw/i2c/aspeed: add DEV_ADDR in old register mode
Add support for writing and reading the device address register in old
register mode.
On the AST2400 (only 1 slave address)
* no upper bits
On the AST2500 (2 possible slave addresses),
* bit[31] : Slave Address match indicator
* bit[30] : Slave Address Receiving pending
On the AST2600 (3 possible slave addresses),
* bit[31-30] : Slave Address match indicator
* bit[29] : Slave Address Receiving pending
The model could be more precise to take into account all fields but
since the Linux driver is masking the register value being set, it
should be fine. See commit 3fb2e2aeafb2 ("i2c: aspeed: disable
additional device addresses on ast2[56]xx") from Zeiv. This can be
addressed later.
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
[ clg: add details to commit log ]
Message-Id: <20220601210831.67259-3-its@irrelevant.dk>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'include/hw/i2c')
| -rw-r--r-- | include/hw/i2c/aspeed_i2c.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/include/hw/i2c/aspeed_i2c.h b/include/hw/i2c/aspeed_i2c.h index 0cd245a009..1398befc10 100644 --- a/include/hw/i2c/aspeed_i2c.h +++ b/include/hw/i2c/aspeed_i2c.h @@ -295,6 +295,14 @@ static inline uint32_t aspeed_i2c_bus_cmd_offset(AspeedI2CBus *bus) return R_I2CD_CMD; } +static inline uint32_t aspeed_i2c_bus_dev_addr_offset(AspeedI2CBus *bus) +{ + if (aspeed_i2c_is_new_mode(bus->controller)) { + return R_I2CS_DEV_ADDR; + } + return R_I2CD_DEV_ADDR; +} + static inline uint32_t aspeed_i2c_bus_intr_ctrl_offset(AspeedI2CBus *bus) { if (aspeed_i2c_is_new_mode(bus->controller)) { |