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authorGerd Hoffmann2020-12-03 11:54:14 +0100
committerGerd Hoffmann2020-12-10 08:47:44 +0100
commit94c5a606379ddd04beecdb11fb34b51b4b28c7f2 (patch)
tree8da6e8b5c7b6b24b7fe525643d3dab61cd3e1279 /include/hw/i386
parentx86: rewrite gsi_handler() (diff)
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x86: add support for second ioapic
Add ioapic_init_secondary to initialize it, wire up in gsi handling and acpi apic table creation. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Sergio Lopez <slp@redhat.com> Message-id: 20201203105423.10431-4-kraxel@redhat.com
Diffstat (limited to 'include/hw/i386')
-rw-r--r--include/hw/i386/ioapic.h2
-rw-r--r--include/hw/i386/ioapic_internal.h2
-rw-r--r--include/hw/i386/x86.h3
3 files changed, 6 insertions, 1 deletions
diff --git a/include/hw/i386/ioapic.h b/include/hw/i386/ioapic.h
index 06bfaaeac6..ef37b8a9fd 100644
--- a/include/hw/i386/ioapic.h
+++ b/include/hw/i386/ioapic.h
@@ -22,6 +22,8 @@
#define IOAPIC_NUM_PINS 24
#define IO_APIC_DEFAULT_ADDRESS 0xfec00000
+#define IO_APIC_SECONDARY_ADDRESS (IO_APIC_DEFAULT_ADDRESS + 0x10000)
+#define IO_APIC_SECONDARY_IRQBASE 24 /* primary 0 -> 23, secondary 24 -> 47 */
#define TYPE_KVM_IOAPIC "kvm-ioapic"
#define TYPE_IOAPIC "ioapic"
diff --git a/include/hw/i386/ioapic_internal.h b/include/hw/i386/ioapic_internal.h
index 0f9002a2c2..021e715f11 100644
--- a/include/hw/i386/ioapic_internal.h
+++ b/include/hw/i386/ioapic_internal.h
@@ -27,7 +27,7 @@
#include "qemu/notify.h"
#include "qom/object.h"
-#define MAX_IOAPICS 1
+#define MAX_IOAPICS 2
#define IOAPIC_LVT_DEST_SHIFT 56
#define IOAPIC_LVT_DEST_IDX_SHIFT 48
diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h
index 739fac5087..3f9b052cfc 100644
--- a/include/hw/i386/x86.h
+++ b/include/hw/i386/x86.h
@@ -50,6 +50,7 @@ struct X86MachineState {
ISADevice *rtc;
FWCfgState *fw_cfg;
qemu_irq *gsi;
+ DeviceState *ioapic2;
GMappedFile *initrd_mapped_file;
HotplugHandler *acpi_dev;
@@ -120,10 +121,12 @@ bool x86_machine_is_acpi_enabled(const X86MachineState *x86ms);
typedef struct GSIState {
qemu_irq i8259_irq[ISA_NUM_IRQS];
qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
+ qemu_irq ioapic2_irq[IOAPIC_NUM_PINS];
} GSIState;
qemu_irq x86_allocate_cpu_irq(void);
void gsi_handler(void *opaque, int n, int level);
void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name);
+DeviceState *ioapic_init_secondary(GSIState *gsi_state);
#endif