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authorBernhard Beschow2022-02-17 11:19:18 +0100
committerPhilippe Mathieu-Daudé2022-03-08 19:16:52 +0100
commitc291635867a03c9217bd9610fe2a16d997932ec0 (patch)
tree67456bd4184f4b2012e2863095876c1bb0a400cd /include/hw/mips
parenttarget/mips: Remove duplicated MIPSCPU::cp0_count_rate (diff)
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hw/mips/gt64xxx_pci: Fix PCI IRQ levels to be preserved during migration
Based on commit e735b55a8c11dd455e31ccd4420e6c9485191d0c: piix_pci: eliminate PIIX3State::pci_irq_levels PIIX3State::pci_irq_levels are redundant which is already tracked by PCIBus layer. So eliminate them. The IRQ levels in the PCIBus layer are already preserved during migration. By reusing them and rather than having a redundant implementation the bug is avoided in the first place. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220217101924.15347-2-shentey@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Diffstat (limited to 'include/hw/mips')
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