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| author | Peter Maydell | 2018-06-19 12:15:27 +0200 |
|---|---|---|
| committer | Peter Maydell | 2018-06-19 12:15:27 +0200 |
| commit | e4a9a7303a70397a89ea23072419976032de4ddc (patch) | |
| tree | 690ecdc7f52fe59230fb2e340326af5d7e4880ec /include/hw/misc/macio/macio.h | |
| parent | Merge remote-tracking branch 'remotes/ehabkost/tags/python-next-pull-request'... (diff) | |
| parent | spapr: fix xics_system_init() error path (diff) | |
| download | qemu-e4a9a7303a70397a89ea23072419976032de4ddc.tar.gz qemu-e4a9a7303a70397a89ea23072419976032de4ddc.tar.xz qemu-e4a9a7303a70397a89ea23072419976032de4ddc.zip | |
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-3.0-20180618' into staging
ppc patch queue 2018-06-18
Next batch of ppc and spapr related patches for the 3.0 release.
* Improved handling of Spectre/Meltdown mitigations for POWER8
* Numerous Mac machine type cleanups and improvements
* Cleanup to cpu realize/unrealize path for spapr
* Create a place for machine-specific per-cpu information, and
start moving some things to it
* Assorted bugfixes
# gpg: Signature made Mon 18 Jun 2018 04:52:37 BST
# gpg: using RSA key 6C38CACA20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>"
# gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>"
# gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>"
# gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>"
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392
* remotes/dgibson/tags/ppc-for-3.0-20180618: (28 commits)
spapr: fix xics_system_init() error path
target/ppc, spapr: Move VPA information to machine_data
ppc/pnv: introduce a pnv_chip_core_realize() routine
spapr_cpu_core: introduce spapr_create_vcpu()
spapr_cpu_core: add missing rollback on realization path
spapr_cpu_core: fix potential leak in spapr_cpu_core_realize()
spapr_cpu_core: convert last snprintf() to g_strdup_printf()
pnv: Add cpu unrealize path
pnv: Clean up cpu realize path
pnv_core: Allocate cpu thread objects individually
pnv: Fix some error handling cpu realize()
spapr: Clean up cpu realize/unrealize paths
sm501: Do not clear read only bits when writing registers
mos6522: expose mos6522_update_irq() through MOS6522DeviceClass
mos6522: remove additional interrupt flag filter from mos6522_update_irq()
mos6522: only clear the shift register interrupt upon write
xics_kvm: fix a build break
mac_newworld: add PMU device
adb: add property to disable direct reg 3 writes
adb: fix read reg 3 byte ordering
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/misc/macio/macio.h')
| -rw-r--r-- | include/hw/misc/macio/macio.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/include/hw/misc/macio/macio.h b/include/hw/misc/macio/macio.h index 838eaf1db0..cfaa145500 100644 --- a/include/hw/misc/macio/macio.h +++ b/include/hw/misc/macio/macio.h @@ -26,8 +26,11 @@ #ifndef MACIO_H #define MACIO_H +#include "hw/char/escc.h" #include "hw/intc/heathrow_pic.h" #include "hw/misc/macio/cuda.h" +#include "hw/misc/macio/gpio.h" +#include "hw/misc/macio/pmu.h" #include "hw/ppc/mac_dbdma.h" #include "hw/ppc/openpic.h" @@ -41,6 +44,7 @@ typedef struct MacIOState { MemoryRegion bar; CUDAState cuda; + PMUState pmu; DBDMAState dbdma; ESCCState escc; uint64_t frequency; @@ -70,8 +74,11 @@ typedef struct NewWorldMacIOState { MacIOState parent_obj; /*< public >*/ + bool has_pmu; + bool has_adb; OpenPICState *pic; MACIOIDEState ide[2]; + MacIOGPIOState gpio; } NewWorldMacIOState; #endif /* MACIO_H */ |