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| author | Eduardo Habkost | 2020-08-31 23:07:30 +0200 |
|---|---|---|
| committer | Eduardo Habkost | 2020-09-18 19:49:48 +0200 |
| commit | ac900edeed585a8e50766c4bd6f370d8bcac3b0e (patch) | |
| tree | 11f51ab7e82362b8252f0cd0ef93509a5ba75edf /include/hw/misc | |
| parent | sifive_u: Rename memmap enum constants (diff) | |
| download | qemu-ac900edeed585a8e50766c4bd6f370d8bcac3b0e.tar.gz qemu-ac900edeed585a8e50766c4bd6f370d8bcac3b0e.tar.xz qemu-ac900edeed585a8e50766c4bd6f370d8bcac3b0e.zip | |
sifive: Move QOM typedefs and add missing includes
Some typedefs and macros are defined after the type check macros.
This makes it difficult to automatically replace their
definitions with OBJECT_DECLARE_TYPE.
Patch generated using:
$ ./scripts/codeconverter/converter.py -i \
--pattern=QOMStructTypedefSplit $(git grep -l '' -- '*.[ch]')
which will split "typdef struct { ... } TypedefName"
declarations.
Followed by:
$ ./scripts/codeconverter/converter.py -i --pattern=MoveSymbols \
$(git grep -l '' -- '*.[ch]')
which will:
- move the typedefs and #defines above the type check macros
- add missing #include "qom/object.h" lines if necessary
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20200831210740.126168-9-ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Diffstat (limited to 'include/hw/misc')
| -rw-r--r-- | include/hw/misc/sifive_e_prci.h | 6 | ||||
| -rw-r--r-- | include/hw/misc/sifive_test.h | 6 | ||||
| -rw-r--r-- | include/hw/misc/sifive_u_otp.h | 6 | ||||
| -rw-r--r-- | include/hw/misc/sifive_u_prci.h | 6 |
4 files changed, 16 insertions, 8 deletions
diff --git a/include/hw/misc/sifive_e_prci.h b/include/hw/misc/sifive_e_prci.h index 698b0b451c..de1e502eea 100644 --- a/include/hw/misc/sifive_e_prci.h +++ b/include/hw/misc/sifive_e_prci.h @@ -18,6 +18,7 @@ #ifndef HW_SIFIVE_E_PRCI_H #define HW_SIFIVE_E_PRCI_H +#include "qom/object.h" enum { SIFIVE_E_PRCI_HFROSCCFG = 0x0, @@ -51,10 +52,11 @@ enum { #define TYPE_SIFIVE_E_PRCI "riscv.sifive.e.prci" +typedef struct SiFiveEPRCIState SiFiveEPRCIState; #define SIFIVE_E_PRCI(obj) \ OBJECT_CHECK(SiFiveEPRCIState, (obj), TYPE_SIFIVE_E_PRCI) -typedef struct SiFiveEPRCIState { +struct SiFiveEPRCIState { /*< private >*/ SysBusDevice parent_obj; @@ -64,7 +66,7 @@ typedef struct SiFiveEPRCIState { uint32_t hfxosccfg; uint32_t pllcfg; uint32_t plloutdiv; -} SiFiveEPRCIState; +}; DeviceState *sifive_e_prci_create(hwaddr addr); diff --git a/include/hw/misc/sifive_test.h b/include/hw/misc/sifive_test.h index 1ec416ac1b..dc54b7af0c 100644 --- a/include/hw/misc/sifive_test.h +++ b/include/hw/misc/sifive_test.h @@ -20,19 +20,21 @@ #define HW_SIFIVE_TEST_H #include "hw/sysbus.h" +#include "qom/object.h" #define TYPE_SIFIVE_TEST "riscv.sifive.test" +typedef struct SiFiveTestState SiFiveTestState; #define SIFIVE_TEST(obj) \ OBJECT_CHECK(SiFiveTestState, (obj), TYPE_SIFIVE_TEST) -typedef struct SiFiveTestState { +struct SiFiveTestState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ MemoryRegion mmio; -} SiFiveTestState; +}; enum { FINISHER_FAIL = 0x3333, diff --git a/include/hw/misc/sifive_u_otp.h b/include/hw/misc/sifive_u_otp.h index 639297564a..4572534f50 100644 --- a/include/hw/misc/sifive_u_otp.h +++ b/include/hw/misc/sifive_u_otp.h @@ -18,6 +18,7 @@ #ifndef HW_SIFIVE_U_OTP_H #define HW_SIFIVE_U_OTP_H +#include "qom/object.h" #define SIFIVE_U_OTP_PA 0x00 #define SIFIVE_U_OTP_PAIO 0x04 @@ -49,10 +50,11 @@ #define TYPE_SIFIVE_U_OTP "riscv.sifive.u.otp" +typedef struct SiFiveUOTPState SiFiveUOTPState; #define SIFIVE_U_OTP(obj) \ OBJECT_CHECK(SiFiveUOTPState, (obj), TYPE_SIFIVE_U_OTP) -typedef struct SiFiveUOTPState { +struct SiFiveUOTPState { /*< private >*/ SysBusDevice parent_obj; @@ -75,6 +77,6 @@ typedef struct SiFiveUOTPState { uint32_t fuse[SIFIVE_U_OTP_NUM_FUSES]; /* config */ uint32_t serial; -} SiFiveUOTPState; +}; #endif /* HW_SIFIVE_U_OTP_H */ diff --git a/include/hw/misc/sifive_u_prci.h b/include/hw/misc/sifive_u_prci.h index 0a531fdadc..83eab43686 100644 --- a/include/hw/misc/sifive_u_prci.h +++ b/include/hw/misc/sifive_u_prci.h @@ -18,6 +18,7 @@ #ifndef HW_SIFIVE_U_PRCI_H #define HW_SIFIVE_U_PRCI_H +#include "qom/object.h" #define SIFIVE_U_PRCI_HFXOSCCFG 0x00 #define SIFIVE_U_PRCI_COREPLLCFG0 0x04 @@ -58,10 +59,11 @@ #define TYPE_SIFIVE_U_PRCI "riscv.sifive.u.prci" +typedef struct SiFiveUPRCIState SiFiveUPRCIState; #define SIFIVE_U_PRCI(obj) \ OBJECT_CHECK(SiFiveUPRCIState, (obj), TYPE_SIFIVE_U_PRCI) -typedef struct SiFiveUPRCIState { +struct SiFiveUPRCIState { /*< private >*/ SysBusDevice parent_obj; @@ -76,7 +78,7 @@ typedef struct SiFiveUPRCIState { uint32_t coreclksel; uint32_t devicesreset; uint32_t clkmuxstatus; -} SiFiveUPRCIState; +}; /* * Clock indexes for use by Device Tree data and the PRCI driver. |
