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authorEdgar E. Iglesias2018-10-11 04:19:23 +0200
committerPeter Maydell2018-10-16 18:13:48 +0200
commit8568313f3bdf4bc1de7ace0eb5b92343fc19f3c8 (patch)
tree9efd2a4129aa29ad5a1a95657ba4cc3060be3928 /include/hw/net
parentnet: cadence_gem: Use uint32_t for 32bit descriptor words (diff)
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net: cadence_gem: Add macro with max number of descriptor words
Add macro with max number of DMA descriptor words. No functional change. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20181011021931.4249-5-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/net')
-rw-r--r--include/hw/net/cadence_gem.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/include/hw/net/cadence_gem.h b/include/hw/net/cadence_gem.h
index 633d564dc3..b33ef6513b 100644
--- a/include/hw/net/cadence_gem.h
+++ b/include/hw/net/cadence_gem.h
@@ -32,6 +32,9 @@
#define CADENCE_GEM_MAXREG (0x00000800 / 4) /* Last valid GEM address */
+/* Max number of words in a DMA descriptor. */
+#define DESC_MAX_NUM_WORDS 2
+
#define MAX_PRIORITY_QUEUES 8
#define MAX_TYPE1_SCREENERS 16
#define MAX_TYPE2_SCREENERS 16
@@ -74,7 +77,7 @@ typedef struct CadenceGEMState {
uint8_t can_rx_state; /* Debug only */
- uint32_t rx_desc[MAX_PRIORITY_QUEUES][2];
+ uint32_t rx_desc[MAX_PRIORITY_QUEUES][DESC_MAX_NUM_WORDS];
bool sar_active[4];
} CadenceGEMState;