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author | Xiaojuan Yang | 2022-06-06 14:43:22 +0200 |
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committer | Richard Henderson | 2022-06-06 20:11:55 +0200 |
commit | 0f4fcf1845fe188901d4ff4cc807bd78690dddd0 (patch) | |
tree | cd7466fdef71bd8219e562c98335e6a78d89ede4 /include/hw/pci-host/ls7a.h | |
parent | hw/loongarch: Add LoongArch ipi interrupt support(IPI) (diff) | |
download | qemu-0f4fcf1845fe188901d4ff4cc807bd78690dddd0.tar.gz qemu-0f4fcf1845fe188901d4ff4cc807bd78690dddd0.tar.xz qemu-0f4fcf1845fe188901d4ff4cc807bd78690dddd0.zip |
hw/intc: Add LoongArch ls7a interrupt controller support(PCH-PIC)
This patch realize the PCH-PIC interrupt controller.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-33-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'include/hw/pci-host/ls7a.h')
-rw-r--r-- | include/hw/pci-host/ls7a.h | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/include/hw/pci-host/ls7a.h b/include/hw/pci-host/ls7a.h new file mode 100644 index 0000000000..bf80e99ce1 --- /dev/null +++ b/include/hw/pci-host/ls7a.h @@ -0,0 +1,30 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * QEMU LoongArch CPU + * + * Copyright (c) 2021 Loongson Technology Corporation Limited + */ + +#ifndef HW_LS7A_H +#define HW_LS7A_H + +#include "hw/pci/pci.h" +#include "hw/pci/pcie_host.h" +#include "hw/pci-host/pam.h" +#include "qemu/units.h" +#include "qemu/range.h" +#include "qom/object.h" + +#define LS7A_PCH_REG_BASE 0x10000000UL +#define LS7A_IOAPIC_REG_BASE (LS7A_PCH_REG_BASE) +#define LS7A_PCH_MSI_ADDR_LOW 0x2FF00000UL + +/* + * According to the kernel pch irq start from 64 offset + * 0 ~ 16 irqs used for non-pci device while 16 ~ 64 irqs + * used for pci device. + */ +#define PCH_PIC_IRQ_OFFSET 64 +#define LS7A_DEVICE_IRQS 16 +#define LS7A_PCI_IRQS 48 +#endif |