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| author | Reza Arbab | 2020-07-17 00:56:55 +0200 |
|---|---|---|
| committer | David Gibson | 2020-07-20 01:21:39 +0200 |
| commit | a6030d7e0b35a23c82e4a765b53dc3847bcdb4d1 (patch) | |
| tree | 0476fd6630d17bd727a20779aeae771348bd7011 /include/hw/pci-host/spapr.h | |
| parent | spapr_pci: Robustify support of PCI bridges (diff) | |
| download | qemu-a6030d7e0b35a23c82e4a765b53dc3847bcdb4d1.tar.gz qemu-a6030d7e0b35a23c82e4a765b53dc3847bcdb4d1.tar.xz qemu-a6030d7e0b35a23c82e4a765b53dc3847bcdb4d1.zip | |
spapr: Add a new level of NUMA for GPUs
NUMA nodes corresponding to GPU memory currently have the same
affinity/distance as normal memory nodes. Add a third NUMA associativity
reference point enabling us to give GPU nodes more distance.
This is guest visible information, which shouldn't change under a
running guest across migration between different qemu versions, so make
the change effective only in new (pseries > 5.0) machine types.
Before, `numactl -H` output in a guest with 4 GPUs (nodes 2-5):
node distances:
node 0 1 2 3 4 5
0: 10 40 40 40 40 40
1: 40 10 40 40 40 40
2: 40 40 10 40 40 40
3: 40 40 40 10 40 40
4: 40 40 40 40 10 40
5: 40 40 40 40 40 10
After:
node distances:
node 0 1 2 3 4 5
0: 10 40 80 80 80 80
1: 40 10 80 80 80 80
2: 80 80 10 80 80 80
3: 80 80 80 10 80 80
4: 80 80 80 80 10 80
5: 80 80 80 80 80 10
These are the same distances as on the host, mirroring the change made
to host firmware in skiboot commit f845a648b8cb ("numa/associativity:
Add a new level of NUMA for GPU's").
Signed-off-by: Reza Arbab <arbab@linux.ibm.com>
Message-Id: <20200716225655.24289-1-arbab@linux.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'include/hw/pci-host/spapr.h')
| -rw-r--r-- | include/hw/pci-host/spapr.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h index 8877ff51fb..600eb55c34 100644 --- a/include/hw/pci-host/spapr.h +++ b/include/hw/pci-host/spapr.h @@ -94,6 +94,7 @@ struct SpaprPhbState { hwaddr nv2_gpa_win_addr; hwaddr nv2_atsd_win_addr; SpaprPhbPciNvGpuConfig *nvgpus; + bool pre_5_1_assoc; }; #define SPAPR_PCI_MEM_WIN_BUS_OFFSET 0x80000000ULL |