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| author | Peter Xu | 2016-07-14 07:56:17 +0200 |
|---|---|---|
| committer | Michael S. Tsirkin | 2016-07-20 18:30:27 +0200 |
| commit | cfc13df4621ccc72e21b670cec8f03f91d9d6dcf (patch) | |
| tree | fd44832d78710f28b7736f7352cc5896f67dfc3a /include/hw/pci-host | |
| parent | intel_iommu: set IR bit for ECAP register (diff) | |
| download | qemu-cfc13df4621ccc72e21b670cec8f03f91d9d6dcf.tar.gz qemu-cfc13df4621ccc72e21b670cec8f03f91d9d6dcf.tar.xz qemu-cfc13df4621ccc72e21b670cec8f03f91d9d6dcf.zip | |
acpi: add DMAR scope definition for root IOAPIC
To enable interrupt remapping for intel IOMMU device, each IOAPIC device
in the system reported via ACPI MADT must be explicitly enumerated under
one specific remapping hardware unit. This patch adds the root-complex
IOAPIC into the default DMAR device.
Please refer to VT-d spec 8.3.1.1 for more information.
Signed-off-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'include/hw/pci-host')
| -rw-r--r-- | include/hw/pci-host/q35.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/include/hw/pci-host/q35.h b/include/hw/pci-host/q35.h index 0d64032d87..94486fdd37 100644 --- a/include/hw/pci-host/q35.h +++ b/include/hw/pci-host/q35.h @@ -179,4 +179,12 @@ typedef struct Q35PCIHost { uint64_t mch_mcfg_base(void); +/* + * Arbitary but unique BNF number for IOAPIC device. + * + * TODO: make sure there would have no conflict with real PCI bus + */ +#define Q35_PSEUDO_BUS_PLATFORM (0xff) +#define Q35_PSEUDO_DEVFN_IOAPIC (0x00) + #endif /* HW_Q35_H */ |