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| author | Peter Maydell | 2017-03-16 12:05:47 +0100 |
|---|---|---|
| committer | Peter Maydell | 2017-03-16 12:05:47 +0100 |
| commit | 3716fba3f58de0eea32b8da29976c902549cc836 (patch) | |
| tree | ed8a5bcc724035d18419f2c8b5f23ba49cb4de7f /include/hw/pci/pcie.h | |
| parent | Merge remote-tracking branch 'remotes/jnsnow/tags/ide-pull-request' into staging (diff) | |
| parent | virtio-serial-bus: Delete timer from list before free it (diff) | |
| download | qemu-3716fba3f58de0eea32b8da29976c902549cc836.tar.gz qemu-3716fba3f58de0eea32b8da29976c902549cc836.tar.xz qemu-3716fba3f58de0eea32b8da29976c902549cc836.zip | |
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
virtio, pci: fixes
More fixes missed in the previous pull request.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
# gpg: Signature made Thu 16 Mar 2017 02:29:49 GMT
# gpg: using RSA key 0x281F0DB8D28D5469
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>"
# gpg: aka "Michael S. Tsirkin <mst@redhat.com>"
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67
# Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469
* remotes/mst/tags/for_upstream:
virtio-serial-bus: Delete timer from list before free it
hw/virtio: fix Power Management Control Register for PCI Express virtio devices
hw/virtio: fix Link Control Register for PCI Express virtio devices
hw/virtio: fix error enabling flags in Device Control register
hw/pcie: fix Extended Configuration Space for devices with no Extended Capabilities
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/pci/pcie.h')
| -rw-r--r-- | include/hw/pci/pcie.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/hw/pci/pcie.h b/include/hw/pci/pcie.h index 163c5195b6..3d8f24b007 100644 --- a/include/hw/pci/pcie.h +++ b/include/hw/pci/pcie.h @@ -63,6 +63,8 @@ typedef enum { struct PCIExpressDevice { /* Offset of express capability in config space */ uint8_t exp_cap; + /* Offset of Power Management capability in config space */ + uint8_t pm_cap; /* SLOT */ bool hpev_notified; /* Logical AND of conditions for hot plug event. @@ -96,6 +98,9 @@ uint8_t pcie_cap_flags_get_vector(PCIDevice *dev); void pcie_cap_deverr_init(PCIDevice *dev); void pcie_cap_deverr_reset(PCIDevice *dev); +void pcie_cap_lnkctl_init(PCIDevice *dev); +void pcie_cap_lnkctl_reset(PCIDevice *dev); + void pcie_cap_slot_init(PCIDevice *dev, uint16_t slot); void pcie_cap_slot_reset(PCIDevice *dev); void pcie_cap_slot_write_config(PCIDevice *dev, |