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authorPeter Maydell2019-07-12 18:34:13 +0200
committerPeter Maydell2019-07-12 18:34:13 +0200
commit46cd24e7ed38191b5ab5c40a836d6c5b6b604f8a (patch)
treecc46f2029433dce9ee655cdb5b5fb5fdb946db9b /include/hw/pci/pcie.h
parentMerge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging (diff)
parentvirtio pmem: remove transitional names (diff)
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Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
virtio, pc, pci: fixes, cleanups, tests A bunch of fixes all over the place. ACPI tests will now run on more systems: might introduce new failure reports but that's for the best, isn't it? Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Fri 12 Jul 2019 15:57:40 BST # gpg: using RSA key 281F0DB8D28D5469 # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: virtio pmem: remove transitional names virtio pmem: remove memdev null check virtio pmem: fix wrong mem region condition tests: acpi: do not skip tests when IASL is not installed tests: acpi: do not require IASL for dumping AML blobs virtio-balloon: fix QEMU 4.0 config size migration incompatibility pcie: consistent names for function args xio3130_downstream: typo fix Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/pci/pcie.h')
-rw-r--r--include/hw/pci/pcie.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/include/hw/pci/pcie.h b/include/hw/pci/pcie.h
index 34f277735c..8cf3361fc4 100644
--- a/include/hw/pci/pcie.h
+++ b/include/hw/pci/pcie.h
@@ -107,9 +107,9 @@ void pcie_cap_lnkctl_reset(PCIDevice *dev);
void pcie_cap_slot_init(PCIDevice *dev, uint16_t slot);
void pcie_cap_slot_reset(PCIDevice *dev);
-void pcie_cap_slot_get(PCIDevice *dev, uint16_t *slot_ctl, uint16_t *slt_sta);
+void pcie_cap_slot_get(PCIDevice *dev, uint16_t *slt_ctl, uint16_t *slt_sta);
void pcie_cap_slot_write_config(PCIDevice *dev,
- uint16_t old_slot_ctl, uint16_t old_slt_sta,
+ uint16_t old_slt_ctl, uint16_t old_slt_sta,
uint32_t addr, uint32_t val, int len);
int pcie_cap_slot_post_load(void *opaque, int version_id);
void pcie_cap_slot_push_attention_button(PCIDevice *dev);