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author | Cédric Le Goater | 2016-11-14 10:12:55 +0100 |
---|---|---|
committer | David Gibson | 2016-11-15 00:08:43 +0100 |
commit | ad521238b458a6d54ab672ed3f94d5edaa786d5c (patch) | |
tree | ba99c2a1079721ce20ed0c30051a5b5204691540 /include/hw/ppc/pnv.h | |
parent | spapr-vty: Fix bad assert() statement (diff) | |
download | qemu-ad521238b458a6d54ab672ed3f94d5edaa786d5c.tar.gz qemu-ad521238b458a6d54ab672ed3f94d5edaa786d5c.tar.xz qemu-ad521238b458a6d54ab672ed3f94d5edaa786d5c.zip |
ppc/pnv: add a 'xscom_core_base' field to PnvChipClass
The XSCOM addresses for the core registers are encoded in a slightly
different way on POWER8 and POWER9.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'include/hw/ppc/pnv.h')
-rw-r--r-- | include/hw/ppc/pnv.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index 7bee658733..df98a72006 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -69,6 +69,7 @@ typedef struct PnvChipClass { uint64_t cores_mask; hwaddr xscom_base; + hwaddr xscom_core_base; uint32_t (*core_pir)(PnvChip *chip, uint32_t core_id); } PnvChipClass; |