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author | Cédric Le Goater | 2016-10-22 11:46:41 +0200 |
---|---|---|
committer | David Gibson | 2016-10-28 00:38:25 +0200 |
commit | 24ece072504b8c8b03861168d601d174a7948099 (patch) | |
tree | 1863bdf931a1db9c8d424202c73f36bda248ffd9 /include/hw/ppc/pnv_xscom.h | |
parent | ppc/pnv: add XSCOM infrastructure (diff) | |
download | qemu-24ece072504b8c8b03861168d601d174a7948099.tar.gz qemu-24ece072504b8c8b03861168d601d174a7948099.tar.xz qemu-24ece072504b8c8b03861168d601d174a7948099.zip |
ppc/pnv: add XSCOM handlers to PnvCore
Now that we are using real HW ids for the cores in PowerNV chips, we
can route the XSCOM accesses to them. We just need to attach a
specific XSCOM memory region to each core in the appropriate window
for the core number.
To start with, let's install the DTS (Digital Thermal Sensor) handlers
which should return 38°C for each core.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'include/hw/ppc/pnv_xscom.h')
-rw-r--r-- | include/hw/ppc/pnv_xscom.h | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h index ee25ec455e..5da6e92e69 100644 --- a/include/hw/ppc/pnv_xscom.h +++ b/include/hw/ppc/pnv_xscom.h @@ -41,6 +41,25 @@ typedef struct PnvXScomInterfaceClass { int (*populate)(PnvXScomInterface *dev, void *fdt, int offset); } PnvXScomInterfaceClass; +/* + * Layout of the XSCOM PCB addresses of EX core 1 + * + * GPIO 0x1100xxxx + * SCOM 0x1101xxxx + * OHA 0x1102xxxx + * CLOCK CTL 0x1103xxxx + * FIR 0x1104xxxx + * THERM 0x1105xxxx + * <reserved> 0x1106xxxx + * .. + * 0x110Exxxx + * PCB SLAVE 0x110Fxxxx + */ + +#define PNV_XSCOM_EX_BASE 0x10000000 +#define PNV_XSCOM_EX_CORE_BASE(i) (PNV_XSCOM_EX_BASE | (((uint64_t)i) << 24)) +#define PNV_XSCOM_EX_CORE_SIZE 0x100000 + extern void pnv_xscom_realize(PnvChip *chip, Error **errp); extern int pnv_xscom_populate(PnvChip *chip, void *fdt, int offset); |