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author | Greg Kurz | 2019-01-17 18:14:39 +0100 |
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committer | David Gibson | 2019-02-17 11:54:02 +0100 |
commit | 5c7adcf422d4bd7235e0d2f2f85efcc393795fb2 (patch) | |
tree | 2b8299f2cca0289979167432b13a6ec77711fc4e /include/hw/ppc/spapr.h | |
parent | hw/ppc/prep: Drop useless inclusion of "hw/i386/pc.h" (diff) | |
download | qemu-5c7adcf422d4bd7235e0d2f2f85efcc393795fb2.tar.gz qemu-5c7adcf422d4bd7235e0d2f2f85efcc393795fb2.tar.xz qemu-5c7adcf422d4bd7235e0d2f2f85efcc393795fb2.zip |
spapr: Rename xics to intc in interrupt controller agnostic code
All this code is used with both the XICS and XIVE interrupt controllers.
Signed-off-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'include/hw/ppc/spapr.h')
-rw-r--r-- | include/hw/ppc/spapr.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index a947a0a0dc..cbd276ed2b 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -683,7 +683,7 @@ void spapr_load_rtas(sPAPRMachineState *spapr, void *fdt, hwaddr addr); * "interrupt-controller" node has its "#interrupt-cells" property set to 2 (ie, * VIO devices, RTAS event sources and PHBs). */ -static inline void spapr_dt_xics_irq(uint32_t *intspec, int irq, bool is_lsi) +static inline void spapr_dt_irq(uint32_t *intspec, int irq, bool is_lsi) { intspec[0] = cpu_to_be32(irq); intspec[1] = is_lsi ? cpu_to_be32(1) : 0; |