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authorCédric Le Goater2018-12-11 23:38:15 +0100
committerDavid Gibson2018-12-20 23:39:13 +0100
commit1a937ad7e7a1b4eef37c967cbaeeda5ec5b90855 (patch)
tree161ed49c070a281d4f38e698bcde246fe44191c9 /include/hw/ppc/spapr_irq.h
parentspapr: add device tree support for the XIVE exploitation mode (diff)
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spapr: allocate the interrupt thread context under the CPU core
Each interrupt mode has its own specific interrupt presenter object, that we store under the CPU object, one for XICS and one for XIVE. Extend the sPAPR IRQ backend with a new handler to support them both. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'include/hw/ppc/spapr_irq.h')
-rw-r--r--include/hw/ppc/spapr_irq.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h
index e51e9f052f..13db0428ab 100644
--- a/include/hw/ppc/spapr_irq.h
+++ b/include/hw/ppc/spapr_irq.h
@@ -41,6 +41,8 @@ typedef struct sPAPRIrq {
void (*print_info)(sPAPRMachineState *spapr, Monitor *mon);
void (*dt_populate)(sPAPRMachineState *spapr, uint32_t nr_servers,
void *fdt, uint32_t phandle);
+ Object *(*cpu_intc_create)(sPAPRMachineState *spapr, Object *cpu,
+ Error **errp);
} sPAPRIrq;
extern sPAPRIrq spapr_irq_xics;