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authorDavid Gibson2019-09-25 07:12:07 +0200
committerDavid Gibson2019-10-04 11:08:23 +0200
commitca62823b79443e3f498c6e6b9fea5f8bbe61033e (patch)
tree1b2e838e044ab583a81d8b998d14feedef313a8b /include/hw/ppc/spapr_irq.h
parentxive: Improve irq claim/free path (diff)
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spapr: Use less cryptic representation of which irq backends are supported
SpaprIrq::ov5 stores the value for a particular byte in PAPR option vector 5 which indicates whether XICS, XIVE or both interrupt controllers are available. As usual for PAPR, the encoding is kind of overly complicated and confusing (though to be fair there are some backwards compat things it has to handle). But to make our internal code clearer, have SpaprIrq encode more directly which backends are available as two booleans, and derive the OV5 value from that at the point we need it. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org>
Diffstat (limited to 'include/hw/ppc/spapr_irq.h')
-rw-r--r--include/hw/ppc/spapr_irq.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h
index ed88b4599a..d3f3b85eb9 100644
--- a/include/hw/ppc/spapr_irq.h
+++ b/include/hw/ppc/spapr_irq.h
@@ -39,7 +39,8 @@ void spapr_irq_msi_free(SpaprMachineState *spapr, int irq, uint32_t num);
typedef struct SpaprIrq {
uint32_t nr_xirqs;
uint32_t nr_msis;
- uint8_t ov5;
+ bool xics;
+ bool xive;
void (*init)(SpaprMachineState *spapr, Error **errp);
int (*claim)(SpaprMachineState *spapr, int irq, bool lsi, Error **errp);