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author | Greg Kurz | 2017-06-14 15:29:19 +0200 |
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committer | David Gibson | 2017-06-30 06:03:31 +0200 |
commit | 46f7afa3709664c7fbc643b2221fd27d5d7762d3 (patch) | |
tree | 1da71747432b602ce53f539aec421f8651d6bd02 /include/hw/ppc | |
parent | xics: directly register ICPState objects to vmstate (diff) | |
download | qemu-46f7afa3709664c7fbc643b2221fd27d5d7762d3.tar.gz qemu-46f7afa3709664c7fbc643b2221fd27d5d7762d3.tar.xz qemu-46f7afa3709664c7fbc643b2221fd27d5d7762d3.zip |
spapr: fix migration of ICPState objects from/to older QEMU
Commit 5bc8d26de20c ("spapr: allocate the ICPState object from under
sPAPRCPUCore") moved ICPState objects from the machine to CPU cores.
This is an improvement since we no longer allocate ICPState objects
that will never be used. But it has the side-effect of breaking
migration of older machine types from older QEMU versions.
This patch allows spapr to register dummy "icp/server" entries to vmstate.
These entries use a dedicated VMStateDescription that can swallow and
discard state of an incoming migration stream, and that don't send anything
on outgoing migration.
As for real ICPState objects, the instance_id is the cpu_index of the
corresponding vCPU, which happens to be equal to the generated instance_id
of older machine types.
The machine can unregister/register these entries when CPUs are dynamically
plugged/unplugged.
This is only available for pseries-2.9 and older machines, thanks to a
compat property.
Signed-off-by: Greg Kurz <groug@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'include/hw/ppc')
-rw-r--r-- | include/hw/ppc/spapr.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 2ddb052c24..a66bbac352 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -53,6 +53,7 @@ struct sPAPRMachineClass { bool dr_lmb_enabled; /* enable dynamic-reconfig/hotplug of LMBs */ bool use_ohci_by_default; /* use USB-OHCI instead of XHCI */ const char *tcg_default_cpu; /* which (TCG) CPU to simulate by default */ + bool pre_2_10_has_unused_icps; void (*phb_placement)(sPAPRMachineState *spapr, uint32_t index, uint64_t *buid, hwaddr *pio, hwaddr *mmio32, hwaddr *mmio64, |