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authorCédric Le Goater2022-03-02 06:51:39 +0100
committerCédric Le Goater2022-03-02 06:51:39 +0100
commit8bf682a349258c3d4a4a4d4fa99ecf7045cf4608 (patch)
treea653a08744f4cc2e977823cb1f0bff541f3250b0 /include/hw/ppc
parentppc/pnv: Add a XIVE2 controller to the POWER10 chip (diff)
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ppc/pnv: Add a OCC model for POWER10
Our OCC model is very mininal and POWER10 can simply reuse the OCC model we introduced for POWER9. Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'include/hw/ppc')
-rw-r--r--include/hw/ppc/pnv.h1
-rw-r--r--include/hw/ppc/pnv_occ.h2
-rw-r--r--include/hw/ppc/pnv_xscom.h3
3 files changed, 6 insertions, 0 deletions
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
index 6b3457b449..21e69b0fc1 100644
--- a/include/hw/ppc/pnv.h
+++ b/include/hw/ppc/pnv.h
@@ -128,6 +128,7 @@ struct Pnv10Chip {
PnvXive2 xive;
Pnv9Psi psi;
PnvLpcController lpc;
+ PnvOCC occ;
};
#define PNV10_PIR2FUSEDCORE(pir) (((pir) >> 3) & 0xf)
diff --git a/include/hw/ppc/pnv_occ.h b/include/hw/ppc/pnv_occ.h
index b78185aeca..f982ba0024 100644
--- a/include/hw/ppc/pnv_occ.h
+++ b/include/hw/ppc/pnv_occ.h
@@ -32,6 +32,8 @@ DECLARE_INSTANCE_CHECKER(PnvOCC, PNV8_OCC,
#define TYPE_PNV9_OCC TYPE_PNV_OCC "-POWER9"
DECLARE_INSTANCE_CHECKER(PnvOCC, PNV9_OCC,
TYPE_PNV9_OCC)
+#define TYPE_PNV10_OCC TYPE_PNV_OCC "-POWER10"
+DECLARE_INSTANCE_CHECKER(PnvOCC, PNV10_OCC, TYPE_PNV10_OCC)
#define PNV_OCC_SENSOR_DATA_BLOCK_OFFSET 0x00580000
#define PNV_OCC_SENSOR_DATA_BLOCK_SIZE 0x00025800
diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h
index 188da874a4..151df15378 100644
--- a/include/hw/ppc/pnv_xscom.h
+++ b/include/hw/ppc/pnv_xscom.h
@@ -131,6 +131,9 @@ struct PnvXScomInterfaceClass {
#define PNV10_XSCOM_PSIHB_BASE 0x3011D00
#define PNV10_XSCOM_PSIHB_SIZE 0x100
+#define PNV10_XSCOM_OCC_BASE PNV9_XSCOM_OCC_BASE
+#define PNV10_XSCOM_OCC_SIZE PNV9_XSCOM_OCC_SIZE
+
#define PNV10_XSCOM_XIVE2_BASE 0x2010800
#define PNV10_XSCOM_XIVE2_SIZE 0x400