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| author | Cédric Le Goater | 2019-07-18 13:54:10 +0200 |
|---|---|---|
| committer | David Gibson | 2019-08-21 09:17:39 +0200 |
| commit | ad31e2d242399bdaa300b940bbef253331c92ec3 (patch) | |
| tree | 68d3f3b6e03764a5889d2bc50bdd35eb9200174f /include/hw/ppc | |
| parent | ppc/xive: Provide unconditional escalation support (diff) | |
| download | qemu-ad31e2d242399bdaa300b940bbef253331c92ec3.tar.gz qemu-ad31e2d242399bdaa300b940bbef253331c92ec3.tar.xz qemu-ad31e2d242399bdaa300b940bbef253331c92ec3.zip | |
ppc/xive: Provide silent escalation support
When the 's' bit is set the escalation is said to be 'silent' or
'silent/gather'. In such configuration, the notification sequence is
skipped and only the escalation sequence is performed. This is used to
configure all the EQs of a vCPU to escalate on a single EQ which will
then target the hypervisor.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20190718115420.19919-8-clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'include/hw/ppc')
| -rw-r--r-- | include/hw/ppc/xive_regs.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/hw/ppc/xive_regs.h b/include/hw/ppc/xive_regs.h index 4378d7259c..fed019516f 100644 --- a/include/hw/ppc/xive_regs.h +++ b/include/hw/ppc/xive_regs.h @@ -212,6 +212,8 @@ typedef struct XiveEND { #define xive_end_is_escalate(end) (be32_to_cpu((end)->w0) & END_W0_ESCALATE_CTL) #define xive_end_is_uncond_escalation(end) \ (be32_to_cpu((end)->w0) & END_W0_UNCOND_ESCALATE) +#define xive_end_is_silent_escalation(end) \ + (be32_to_cpu((end)->w0) & END_W0_SILENT_ESCALATE) static inline uint64_t xive_end_qaddr(XiveEND *end) { |