diff options
| author | Yifei Jiang | 2022-01-12 09:13:22 +0100 |
|---|---|---|
| committer | Alistair Francis | 2022-01-21 06:52:56 +0100 |
| commit | ad40be27084536408b47a9209181f776ec2c54a5 (patch) | |
| tree | c6107ad96cf9f20242e17b6668f99d1a7707f9f6 /include/hw/riscv/boot.h | |
| parent | target/riscv: Implement kvm_arch_put_registers (diff) | |
| download | qemu-ad40be27084536408b47a9209181f776ec2c54a5.tar.gz qemu-ad40be27084536408b47a9209181f776ec2c54a5.tar.xz qemu-ad40be27084536408b47a9209181f776ec2c54a5.zip | |
target/riscv: Support start kernel directly by KVM
Get kernel and fdt start address in virt.c, and pass them to KVM
when cpu reset. Add kvm_riscv.h to place riscv specific interface.
In addition, PLIC is created without M-mode PLIC contexts when KVM
is enabled.
Signed-off-by: Yifei Jiang <jiangyifei@huawei.com>
Signed-off-by: Mingwang Li <limingwang@huawei.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Message-id: 20220112081329.1835-7-jiangyifei@huawei.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'include/hw/riscv/boot.h')
| -rw-r--r-- | include/hw/riscv/boot.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h index baff11dd8a..5834c234aa 100644 --- a/include/hw/riscv/boot.h +++ b/include/hw/riscv/boot.h @@ -58,5 +58,6 @@ void riscv_rom_copy_firmware_info(MachineState *machine, hwaddr rom_base, hwaddr rom_size, uint32_t reset_vec_size, uint64_t kernel_entry); +void riscv_setup_direct_kernel(hwaddr kernel_addr, hwaddr fdt_addr); #endif /* RISCV_BOOT_H */ |