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author | Alistair Francis | 2021-07-09 05:38:39 +0200 |
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committer | Alistair Francis | 2021-07-15 00:56:00 +0200 |
commit | 5ee257649f1a69d952c56f0a7084653e51971ce5 (patch) | |
tree | bcb8fb59dc8a9ce9858119cec1a1b3674778f8d8 /include/hw/riscv/opentitan.h | |
parent | char: ibex_uart: Update the register layout (diff) | |
download | qemu-5ee257649f1a69d952c56f0a7084653e51971ce5.tar.gz qemu-5ee257649f1a69d952c56f0a7084653e51971ce5.tar.xz qemu-5ee257649f1a69d952c56f0a7084653e51971ce5.zip |
hw/riscv: opentitan: Add the unimplement rv_core_ibex_peri
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id: ed707782e84118e1b06a32fd79b70fecfb54ff82.1625801868.git.alistair.francis@wdc.com
Diffstat (limited to 'include/hw/riscv/opentitan.h')
-rw-r--r-- | include/hw/riscv/opentitan.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/riscv/opentitan.h b/include/hw/riscv/opentitan.h index 86cceef698..a488f5e8ec 100644 --- a/include/hw/riscv/opentitan.h +++ b/include/hw/riscv/opentitan.h @@ -81,6 +81,7 @@ enum { IBEX_DEV_ALERT_HANDLER, IBEX_DEV_NMI_GEN, IBEX_DEV_OTBN, + IBEX_DEV_PERI, }; enum { |