diff options
| author | Alistair Francis | 2020-12-15 02:56:54 +0100 |
|---|---|---|
| committer | Alistair Francis | 2020-12-18 06:56:44 +0100 |
| commit | d31e970a01e7399b9cd43ec0dc00c857d968987e (patch) | |
| tree | f7e62273c6e9697bd2cc28a88e4aad8ef21adc69 /include/hw/riscv/opentitan.h | |
| parent | hw/riscv: Use the CPU to determine if 32-bit (diff) | |
| download | qemu-d31e970a01e7399b9cd43ec0dc00c857d968987e.tar.gz qemu-d31e970a01e7399b9cd43ec0dc00c857d968987e.tar.xz qemu-d31e970a01e7399b9cd43ec0dc00c857d968987e.zip | |
riscv/opentitan: Update the OpenTitan memory layout
OpenTitan is currently only avalible on an FPGA platform and the memory
addresses have changed. Update to use the new memory addresses.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 8eb65314830a75d0fea3fccf77bc45b8ddd01c42.1607982831.git.alistair.francis@wdc.com
Diffstat (limited to 'include/hw/riscv/opentitan.h')
| -rw-r--r-- | include/hw/riscv/opentitan.h | 23 |
1 files changed, 17 insertions, 6 deletions
diff --git a/include/hw/riscv/opentitan.h b/include/hw/riscv/opentitan.h index 5ff0c0f85e..a5ea3a5e4e 100644 --- a/include/hw/riscv/opentitan.h +++ b/include/hw/riscv/opentitan.h @@ -55,19 +55,30 @@ enum { IBEX_DEV_UART, IBEX_DEV_GPIO, IBEX_DEV_SPI, - IBEX_DEV_FLASH_CTRL, + IBEX_DEV_I2C, + IBEX_DEV_PATTGEN, IBEX_DEV_RV_TIMER, - IBEX_DEV_AES, - IBEX_DEV_HMAC, - IBEX_DEV_PLIC, + IBEX_DEV_SENSOR_CTRL, + IBEX_DEV_OTP_CTRL, IBEX_DEV_PWRMGR, IBEX_DEV_RSTMGR, IBEX_DEV_CLKMGR, IBEX_DEV_PINMUX, + IBEX_DEV_PADCTRL, + IBEX_DEV_USBDEV, + IBEX_DEV_FLASH_CTRL, + IBEX_DEV_PLIC, + IBEX_DEV_AES, + IBEX_DEV_HMAC, + IBEX_DEV_KMAC, + IBEX_DEV_KEYMGR, + IBEX_DEV_CSRNG, + IBEX_DEV_ENTROPY, + IBEX_DEV_EDNO, + IBEX_DEV_EDN1, IBEX_DEV_ALERT_HANDLER, IBEX_DEV_NMI_GEN, - IBEX_DEV_USBDEV, - IBEX_DEV_PADCTRL, + IBEX_DEV_OTBN, }; enum { |