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| author | Ian Jiang | 2020-01-28 01:37:07 +0100 |
|---|---|---|
| committer | Alistair Francis | 2020-06-19 17:24:07 +0200 |
| commit | 354908cee1f7ff761b5fedbdb6376c378c10f941 (patch) | |
| tree | 8c1a64811f91139c538ac9f80d1248fef51c9582 /include/hw/riscv | |
| parent | Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20200618' into staging (diff) | |
| download | qemu-354908cee1f7ff761b5fedbdb6376c378c10f941.tar.gz qemu-354908cee1f7ff761b5fedbdb6376c378c10f941.tar.xz qemu-354908cee1f7ff761b5fedbdb6376c378c10f941.zip | |
riscv: Add helper to make NaN-boxing for FP register
The function that makes NaN-boxing when a 32-bit value is assigned
to a 64-bit FP register is split out to a helper gen_nanbox_fpr().
Then it is applied in translating of the FLW instruction.
Signed-off-by: Ian Jiang <ianjiang.ict@gmail.com>
Message-Id: <20200128003707.17028-1-ianjiang.ict@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'include/hw/riscv')
0 files changed, 0 insertions, 0 deletions