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author | Bin Meng | 2020-09-03 12:40:17 +0200 |
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committer | Alistair Francis | 2020-09-10 00:54:19 +0200 |
commit | 84fcf3c15111de9f0c72efbb6bc0def264555c46 (patch) | |
tree | 57567c453d5ea85f06f0c753aefa4fa0d9709eae /include/hw/riscv | |
parent | hw/riscv: Move sifive_clint model to hw/intc (diff) | |
download | qemu-84fcf3c15111de9f0c72efbb6bc0def264555c46.tar.gz qemu-84fcf3c15111de9f0c72efbb6bc0def264555c46.tar.xz qemu-84fcf3c15111de9f0c72efbb6bc0def264555c46.zip |
hw/riscv: Move sifive_plic model to hw/intc
This is an effort to clean up the hw/riscv directory. Ideally it
should only contain the RISC-V SoC / machine codes plus generic
codes. Let's move sifive_plic model to hw/intc directory.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <1599129623-68957-7-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'include/hw/riscv')
-rw-r--r-- | include/hw/riscv/sifive_plic.h | 81 |
1 files changed, 0 insertions, 81 deletions
diff --git a/include/hw/riscv/sifive_plic.h b/include/hw/riscv/sifive_plic.h deleted file mode 100644 index ace76d0f1b..0000000000 --- a/include/hw/riscv/sifive_plic.h +++ /dev/null @@ -1,81 +0,0 @@ -/* - * SiFive PLIC (Platform Level Interrupt Controller) interface - * - * Copyright (c) 2017 SiFive, Inc. - * - * This provides a RISC-V PLIC device - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2 or later, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. - */ - -#ifndef HW_SIFIVE_PLIC_H -#define HW_SIFIVE_PLIC_H - -#include "hw/sysbus.h" - -#define TYPE_SIFIVE_PLIC "riscv.sifive.plic" - -#define SIFIVE_PLIC(obj) \ - OBJECT_CHECK(SiFivePLICState, (obj), TYPE_SIFIVE_PLIC) - -typedef enum PLICMode { - PLICMode_U, - PLICMode_S, - PLICMode_H, - PLICMode_M -} PLICMode; - -typedef struct PLICAddr { - uint32_t addrid; - uint32_t hartid; - PLICMode mode; -} PLICAddr; - -typedef struct SiFivePLICState { - /*< private >*/ - SysBusDevice parent_obj; - - /*< public >*/ - MemoryRegion mmio; - uint32_t num_addrs; - uint32_t num_harts; - uint32_t bitfield_words; - PLICAddr *addr_config; - uint32_t *source_priority; - uint32_t *target_priority; - uint32_t *pending; - uint32_t *claimed; - uint32_t *enable; - - /* config */ - char *hart_config; - uint32_t hartid_base; - uint32_t num_sources; - uint32_t num_priorities; - uint32_t priority_base; - uint32_t pending_base; - uint32_t enable_base; - uint32_t enable_stride; - uint32_t context_base; - uint32_t context_stride; - uint32_t aperture_size; -} SiFivePLICState; - -DeviceState *sifive_plic_create(hwaddr addr, char *hart_config, - uint32_t hartid_base, uint32_t num_sources, - uint32_t num_priorities, uint32_t priority_base, - uint32_t pending_base, uint32_t enable_base, - uint32_t enable_stride, uint32_t context_base, - uint32_t context_stride, uint32_t aperture_size); - -#endif |