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| author | Luc MICHEL | 2018-01-25 12:45:30 +0100 |
|---|---|---|
| committer | Peter Maydell | 2018-01-25 12:45:30 +0100 |
| commit | 421a3c224e2c4c5d2dfd9309d7357f3369ed30e0 (patch) | |
| tree | b147668c555cee7329363a38823578945e29e7ad /include/hw/sd | |
| parent | hw/intc/arm_gic: Fix group priority computation for group 1 IRQs (diff) | |
| download | qemu-421a3c224e2c4c5d2dfd9309d7357f3369ed30e0.tar.gz qemu-421a3c224e2c4c5d2dfd9309d7357f3369ed30e0.tar.xz qemu-421a3c224e2c4c5d2dfd9309d7357f3369ed30e0.zip | |
hw/intc/arm_gic: Fix the NS view of C_BPR when C_CTRL.CBPR is 1
When C_CTRL.CBPR is 1, the Non-Secure view of C_BPR is altered:
- A Non-Secure read of C_BPR should return the BPR value plus 1,
saturated to 7,
- A Non-Secure write should be ignored.
Signed-off-by: Luc MICHEL <luc.michel@git.antfield.fr>
Message-id: 20180119145756.7629-6-luc.michel@greensocs.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: fixed comment typo]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/sd')
0 files changed, 0 insertions, 0 deletions