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| author | Tong Ho | 2021-09-17 07:23:52 +0200 |
|---|---|---|
| committer | Peter Maydell | 2021-09-30 14:42:09 +0200 |
| commit | 68fbcc344ef6fb2dff0eb4cac0319ea7af010a7f (patch) | |
| tree | b597e6df805b6556f21d30a36a4039a521298ee3 /include/hw/timer/aspeed_timer.h | |
| parent | arm: tcg: Adhere to SMCCC 1.3 section 5.2 (diff) | |
| download | qemu-68fbcc344ef6fb2dff0eb4cac0319ea7af010a7f.tar.gz qemu-68fbcc344ef6fb2dff0eb4cac0319ea7af010a7f.tar.xz qemu-68fbcc344ef6fb2dff0eb4cac0319ea7af010a7f.zip | |
hw/nvram: Introduce Xilinx eFuse QOM
This introduces the QOM for Xilinx eFuse, an one-time
field-programmable storage bit array.
The actual mmio interface to the array varies by device
families and will be provided in different change-sets.
Co-authored-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Co-authored-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Signed-off-by: Tong Ho <tong.ho@xilinx.com>
Message-id: 20210917052400.1249094-2-tong.ho@xilinx.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/timer/aspeed_timer.h')
0 files changed, 0 insertions, 0 deletions