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| author | Philippe Mathieu-Daudé | 2020-05-04 09:28:21 +0200 |
|---|---|---|
| committer | Peter Maydell | 2020-05-11 12:05:52 +0200 |
| commit | 27d6dea3d702b4f9cefacfc8438a9478c03092e4 (patch) | |
| tree | a8b2a2aed46997ef9631814bebf364ff4d182896 /include/hw/timer | |
| parent | hw/arm/nrf51: Add NRF51_PERIPHERAL_SIZE definition (diff) | |
| download | qemu-27d6dea3d702b4f9cefacfc8438a9478c03092e4.tar.gz qemu-27d6dea3d702b4f9cefacfc8438a9478c03092e4.tar.xz qemu-27d6dea3d702b4f9cefacfc8438a9478c03092e4.zip | |
hw/timer/nrf51_timer: Display timer ID in trace events
The NRF51 series SoC have 3 timer peripherals, each having
4 counters. To help differentiate which peripheral is accessed,
display the timer ID in the trace events.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200504072822.18799-4-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/timer')
| -rw-r--r-- | include/hw/timer/nrf51_timer.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/timer/nrf51_timer.h b/include/hw/timer/nrf51_timer.h index 85cad2300d..eb6815f21d 100644 --- a/include/hw/timer/nrf51_timer.h +++ b/include/hw/timer/nrf51_timer.h @@ -59,6 +59,7 @@ typedef struct NRF51TimerState { MemoryRegion iomem; qemu_irq irq; + uint8_t id; QEMUTimer timer; int64_t timer_start_ns; int64_t update_counter_ns; |