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| author | Asherah Connor | 2021-03-19 00:50:40 +0100 |
|---|---|---|
| committer | Alistair Francis | 2021-03-23 02:54:40 +0100 |
| commit | 0489348d0d31f216e925855f3ac37a6fc666aaaf (patch) | |
| tree | 04aea6eb5b50f52bb641a6b508cf085ca06972bc /include/hw | |
| parent | target/riscv: Use background registers also for MSTATUS_MPV (diff) | |
| download | qemu-0489348d0d31f216e925855f3ac37a6fc666aaaf.tar.gz qemu-0489348d0d31f216e925855f3ac37a6fc666aaaf.tar.xz qemu-0489348d0d31f216e925855f3ac37a6fc666aaaf.zip | |
hw/riscv: Add fw_cfg support to virt
Provides fw_cfg for the virt machine on riscv. This enables
using e.g. ramfb later.
Signed-off-by: Asherah Connor <ashe@kivikakk.ee>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210318235041.17175-2-ashe@kivikakk.ee
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'include/hw')
| -rw-r--r-- | include/hw/riscv/virt.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h index 632da52018..349fee1f89 100644 --- a/include/hw/riscv/virt.h +++ b/include/hw/riscv/virt.h @@ -40,6 +40,7 @@ struct RISCVVirtState { RISCVHartArrayState soc[VIRT_SOCKETS_MAX]; DeviceState *plic[VIRT_SOCKETS_MAX]; PFlashCFI01 *flash[2]; + FWCfgState *fw_cfg; int fdt_size; }; @@ -53,6 +54,7 @@ enum { VIRT_PLIC, VIRT_UART0, VIRT_VIRTIO, + VIRT_FW_CFG, VIRT_FLASH, VIRT_DRAM, VIRT_PCIE_MMIO, |