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| author | Peter Maydell | 2020-05-22 16:55:20 +0200 |
|---|---|---|
| committer | Peter Maydell | 2020-06-05 18:23:10 +0200 |
| commit | 2c35a39eda0b16c2ed85c94cec204bf5efb97812 (patch) | |
| tree | 5a1cc33d2f08810b8d2f1c8133520e2c56635e69 /include/hw | |
| parent | target/arm: Convert VCVT fixed-point ops to decodetree (diff) | |
| download | qemu-2c35a39eda0b16c2ed85c94cec204bf5efb97812.tar.gz qemu-2c35a39eda0b16c2ed85c94cec204bf5efb97812.tar.xz qemu-2c35a39eda0b16c2ed85c94cec204bf5efb97812.zip | |
target/arm: Convert Neon one-register-and-immediate insns to decodetree
Convert the insns in the one-register-and-immediate group to decodetree.
In the new decode, our asimd_imm_const() function returns a 64-bit value
rather than a 32-bit one, which means we don't need to treat cmode=14 op=1
as a special case in the decoder (it is the only encoding where the two
halves of the 64-bit value are different).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200522145520.6778-10-peter.maydell@linaro.org
Diffstat (limited to 'include/hw')
0 files changed, 0 insertions, 0 deletions
