diff options
| author | Anup Patel | 2020-05-14 12:21:31 +0200 |
|---|---|---|
| committer | Alistair Francis | 2020-08-25 18:11:35 +0200 |
| commit | 3bf03f08999b9a469a61279a04041bcbfadad6a8 (patch) | |
| tree | e43634385ee0e9b1e634c22388d529857daa75d1 /include/hw | |
| parent | Merge remote-tracking branch 'remotes/kraxel/tags/fixes-20200825-pull-request... (diff) | |
| download | qemu-3bf03f08999b9a469a61279a04041bcbfadad6a8.tar.gz qemu-3bf03f08999b9a469a61279a04041bcbfadad6a8.tar.xz qemu-3bf03f08999b9a469a61279a04041bcbfadad6a8.zip | |
hw/riscv: Allow creating multiple instances of CLINT
We extend CLINT emulation to allow multiple instances of CLINT in
a QEMU RISC-V machine. To achieve this, we remove first HART id
zero assumption from CLINT emulation.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
Message-Id: <20200616032229.766089-2-anup.patel@wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'include/hw')
| -rw-r--r-- | include/hw/riscv/sifive_clint.h | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/include/hw/riscv/sifive_clint.h b/include/hw/riscv/sifive_clint.h index 4a720bfece..9f5fb3d31d 100644 --- a/include/hw/riscv/sifive_clint.h +++ b/include/hw/riscv/sifive_clint.h @@ -33,6 +33,7 @@ typedef struct SiFiveCLINTState { /*< public >*/ MemoryRegion mmio; + uint32_t hartid_base; uint32_t num_harts; uint32_t sip_base; uint32_t timecmp_base; @@ -40,9 +41,9 @@ typedef struct SiFiveCLINTState { uint32_t aperture_size; } SiFiveCLINTState; -DeviceState *sifive_clint_create(hwaddr addr, hwaddr size, uint32_t num_harts, - uint32_t sip_base, uint32_t timecmp_base, uint32_t time_base, - bool provide_rdtime); +DeviceState *sifive_clint_create(hwaddr addr, hwaddr size, + uint32_t hartid_base, uint32_t num_harts, uint32_t sip_base, + uint32_t timecmp_base, uint32_t time_base, bool provide_rdtime); enum { SIFIVE_SIP_BASE = 0x0, |