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author | Phil Dennis-Jordan | 2017-03-15 07:20:26 +0100 |
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committer | Paolo Bonzini | 2017-05-03 12:29:40 +0200 |
commit | 77af8a2b95b79699de650965d5228772743efe84 (patch) | |
tree | 99f42e47728226f4743aa91b234451343d63cebc /include/hw | |
parent | Merge remote-tracking branch 'sthibault/tags/samuel-thibault' into staging (diff) | |
download | qemu-77af8a2b95b79699de650965d5228772743efe84.tar.gz qemu-77af8a2b95b79699de650965d5228772743efe84.tar.xz qemu-77af8a2b95b79699de650965d5228772743efe84.zip |
hw/i386: Use Rev3 FADT (ACPI 2.0) instead of Rev1 to improve guest OS support.
This updates the FADT generated for x86/64 machine types from Revision 1 to 3. (Based on ACPI standard 2.0 instead of 1.0) The intention is to expose the reset register information to guest operating systems which require it, specifically OS X/macOS. Revision 1 FADTs do not contain the fields relating to the reset register.
The new layout and contents remains backwards-compatible with operating systems which only support ACPI 1.0, as the existing fields are not modified by this change, as the 64-bit and 32-bit variants are allowed to co-exist according to the ACPI 2.0 standard. No regressions became apparent in tests with a range of Windows (XP-10) and Linux versions.
The BIOS tables test suite's FADT checksum test has also been updated to reflect the new FADT layout and content.
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
Message-Id: <1489558827-28971-2-git-send-email-phil@philjordan.eu>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'include/hw')
-rw-r--r-- | include/hw/acpi/acpi-defs.h | 77 |
1 files changed, 36 insertions, 41 deletions
diff --git a/include/hw/acpi/acpi-defs.h b/include/hw/acpi/acpi-defs.h index 4cc3630e61..293ee4524b 100644 --- a/include/hw/acpi/acpi-defs.h +++ b/include/hw/acpi/acpi-defs.h @@ -131,17 +131,37 @@ typedef struct AcpiTableHeader AcpiTableHeader; uint8_t duty_width; /* Bit width of duty cycle field in p_cnt reg */ \ uint8_t day_alrm; /* Index to day-of-month alarm in RTC CMOS RAM */ \ uint8_t mon_alrm; /* Index to month-of-year alarm in RTC CMOS RAM */ \ - uint8_t century; /* Index to century in RTC CMOS RAM */ - -struct AcpiFadtDescriptorRev1 -{ - ACPI_FADT_COMMON_DEF - uint8_t reserved4; /* Reserved */ - uint8_t reserved4a; /* Reserved */ - uint8_t reserved4b; /* Reserved */ - uint32_t flags; -} QEMU_PACKED; -typedef struct AcpiFadtDescriptorRev1 AcpiFadtDescriptorRev1; + uint8_t century; /* Index to century in RTC CMOS RAM */ \ + /* IA-PC Boot Architecture Flags (see below for individual flags) */ \ + uint16_t boot_flags; \ + uint8_t reserved; /* Reserved, must be zero */ \ + /* Miscellaneous flag bits (see below for individual flags) */ \ + uint32_t flags; \ + /* 64-bit address of the Reset register */ \ + struct AcpiGenericAddress reset_register; \ + /* Value to write to the reset_register port to reset the system */ \ + uint8_t reset_value; \ + /* ARM-Specific Boot Flags (see below for individual flags) (ACPI 5.1) */ \ + uint16_t arm_boot_flags; \ + uint8_t minor_revision; /* FADT Minor Revision (ACPI 5.1) */ \ + uint64_t Xfacs; /* 64-bit physical address of FACS */ \ + uint64_t Xdsdt; /* 64-bit physical address of DSDT */ \ + /* 64-bit Extended Power Mgt 1a Event Reg Blk address */ \ + struct AcpiGenericAddress xpm1a_event_block; \ + /* 64-bit Extended Power Mgt 1b Event Reg Blk address */ \ + struct AcpiGenericAddress xpm1b_event_block; \ + /* 64-bit Extended Power Mgt 1a Control Reg Blk address */ \ + struct AcpiGenericAddress xpm1a_control_block; \ + /* 64-bit Extended Power Mgt 1b Control Reg Blk address */ \ + struct AcpiGenericAddress xpm1b_control_block; \ + /* 64-bit Extended Power Mgt 2 Control Reg Blk address */ \ + struct AcpiGenericAddress xpm2_control_block; \ + /* 64-bit Extended Power Mgt Timer Ctrl Reg Blk address */ \ + struct AcpiGenericAddress xpm_timer_block; \ + /* 64-bit Extended General Purpose Event 0 Reg Blk address */ \ + struct AcpiGenericAddress xgpe0_block; \ + /* 64-bit Extended General Purpose Event 1 Reg Blk address */ \ + struct AcpiGenericAddress xgpe1_block; \ struct AcpiGenericAddress { uint8_t space_id; /* Address space where struct or register exists */ @@ -151,38 +171,13 @@ struct AcpiGenericAddress { uint64_t address; /* 64-bit address of struct or register */ } QEMU_PACKED; +struct AcpiFadtDescriptorRev3 { + ACPI_FADT_COMMON_DEF +} QEMU_PACKED; +typedef struct AcpiFadtDescriptorRev3 AcpiFadtDescriptorRev3; + struct AcpiFadtDescriptorRev5_1 { ACPI_FADT_COMMON_DEF - /* IA-PC Boot Architecture Flags (see below for individual flags) */ - uint16_t boot_flags; - uint8_t reserved; /* Reserved, must be zero */ - /* Miscellaneous flag bits (see below for individual flags) */ - uint32_t flags; - /* 64-bit address of the Reset register */ - struct AcpiGenericAddress reset_register; - /* Value to write to the reset_register port to reset the system */ - uint8_t reset_value; - /* ARM-Specific Boot Flags (see below for individual flags) (ACPI 5.1) */ - uint16_t arm_boot_flags; - uint8_t minor_revision; /* FADT Minor Revision (ACPI 5.1) */ - uint64_t Xfacs; /* 64-bit physical address of FACS */ - uint64_t Xdsdt; /* 64-bit physical address of DSDT */ - /* 64-bit Extended Power Mgt 1a Event Reg Blk address */ - struct AcpiGenericAddress xpm1a_event_block; - /* 64-bit Extended Power Mgt 1b Event Reg Blk address */ - struct AcpiGenericAddress xpm1b_event_block; - /* 64-bit Extended Power Mgt 1a Control Reg Blk address */ - struct AcpiGenericAddress xpm1a_control_block; - /* 64-bit Extended Power Mgt 1b Control Reg Blk address */ - struct AcpiGenericAddress xpm1b_control_block; - /* 64-bit Extended Power Mgt 2 Control Reg Blk address */ - struct AcpiGenericAddress xpm2_control_block; - /* 64-bit Extended Power Mgt Timer Ctrl Reg Blk address */ - struct AcpiGenericAddress xpm_timer_block; - /* 64-bit Extended General Purpose Event 0 Reg Blk address */ - struct AcpiGenericAddress xgpe0_block; - /* 64-bit Extended General Purpose Event 1 Reg Blk address */ - struct AcpiGenericAddress xgpe1_block; /* 64-bit Sleep Control register (ACPI 5.0) */ struct AcpiGenericAddress sleep_control; /* 64-bit Sleep Status register (ACPI 5.0) */ |