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| author | Suraj Jitindar Singh | 2019-03-01 04:19:12 +0100 |
|---|---|---|
| committer | David Gibson | 2019-03-12 02:07:49 +0100 |
| commit | 8ff43ee404d3e295839d1fd4e9e6571ca7a62a66 (patch) | |
| tree | f3a77de59523fe38cc5479afdc3087e8c7f7b53f /include/hw | |
| parent | target/ppc/spapr: Add workaround option to SPAPR_CAP_IBS (diff) | |
| download | qemu-8ff43ee404d3e295839d1fd4e9e6571ca7a62a66.tar.gz qemu-8ff43ee404d3e295839d1fd4e9e6571ca7a62a66.tar.xz qemu-8ff43ee404d3e295839d1fd4e9e6571ca7a62a66.zip | |
target/ppc/spapr: Add SPAPR_CAP_CCF_ASSIST
Introduce a new spapr_cap SPAPR_CAP_CCF_ASSIST to be used to indicate
the requirement for a hw-assisted version of the count cache flush
workaround.
The count cache flush workaround is a software workaround which can be
used to flush the count cache on context switch. Some revisions of
hardware may have a hardware accelerated flush, in which case the
software flush can be shortened. This cap is used to set the
availability of such hardware acceleration for the count cache flush
routine.
The availability of such hardware acceleration is indicated by the
H_CPU_CHAR_BCCTR_FLUSH_ASSIST flag being set in the characteristics
returned from the KVM_PPC_GET_CPU_CHAR ioctl.
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Message-Id: <20190301031912.28809-2-sjitindarsingh@gmail.com>
[dwg: Small style fixes]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'include/hw')
| -rw-r--r-- | include/hw/ppc/spapr.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index a7f3b1bfdd..ff1bd60615 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -76,8 +76,10 @@ typedef enum { #define SPAPR_CAP_NESTED_KVM_HV 0x07 /* Large Decrementer */ #define SPAPR_CAP_LARGE_DECREMENTER 0x08 +/* Count Cache Flush Assist HW Instruction */ +#define SPAPR_CAP_CCF_ASSIST 0x09 /* Num Caps */ -#define SPAPR_CAP_NUM (SPAPR_CAP_LARGE_DECREMENTER + 1) +#define SPAPR_CAP_NUM (SPAPR_CAP_CCF_ASSIST + 1) /* * Capability Values @@ -838,6 +840,7 @@ extern const VMStateDescription vmstate_spapr_cap_sbbc; extern const VMStateDescription vmstate_spapr_cap_ibs; extern const VMStateDescription vmstate_spapr_cap_nested_kvm_hv; extern const VMStateDescription vmstate_spapr_cap_large_decr; +extern const VMStateDescription vmstate_spapr_cap_ccf_assist; static inline uint8_t spapr_get_cap(sPAPRMachineState *spapr, int cap) { |