diff options
| author | Cédric Le Goater | 2019-09-25 16:32:31 +0200 |
|---|---|---|
| committer | Peter Maydell | 2019-10-15 19:09:04 +0200 |
| commit | c20375dd8678eae2462a986938e6d119cb5abefa (patch) | |
| tree | 1f7622b8bbe5e525cc00386d6cae57835ffd8ab5 /include/hw | |
| parent | aspeed/timer: Add support for control register 3 (diff) | |
| download | qemu-c20375dd8678eae2462a986938e6d119cb5abefa.tar.gz qemu-c20375dd8678eae2462a986938e6d119cb5abefa.tar.xz qemu-c20375dd8678eae2462a986938e6d119cb5abefa.zip | |
aspeed/timer: Add AST2600 support
The AST2600 timer has a third control register that is used to
implement a set-to-clear feature for the main control register.
On the AST2600, it is not configurable via 0x38 (control register 3)
as it is on the AST2500.
Based on previous work from Joel Stanley.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-id: 20190925143248.10000-7-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw')
| -rw-r--r-- | include/hw/timer/aspeed_timer.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/timer/aspeed_timer.h b/include/hw/timer/aspeed_timer.h index 1e0288ebc4..69b1377af0 100644 --- a/include/hw/timer/aspeed_timer.h +++ b/include/hw/timer/aspeed_timer.h @@ -30,6 +30,7 @@ #define TYPE_ASPEED_TIMER "aspeed.timer" #define TYPE_ASPEED_2400_TIMER TYPE_ASPEED_TIMER "-ast2400" #define TYPE_ASPEED_2500_TIMER TYPE_ASPEED_TIMER "-ast2500" +#define TYPE_ASPEED_2600_TIMER TYPE_ASPEED_TIMER "-ast2600" #define ASPEED_TIMER_NR_TIMERS 8 |